Our research is centered on the development of a fully integrated, reprogrammable memristor chip. This chip includes a passive memristor crossbar array seamlessly integrated with all essential interface circuitry, digital buses, and a processor, creating a comprehensive neuromorphic hardware system-on-chip. 

The memristor array's exceptional high density and non-volatile characteristics enable the on-chip storage of entire Deep Neural Network (DNN) models. This effectively eliminates the inefficiencies associated with off-chip memory access, leading to the promise of significantly improved energy efficiency in DNN operations. 

Our research focuses on hardware implementations of Spiking Neural Networks (SNNs), which process information through discrete spike events inspired by biological neural systems. By leveraging the intrinsic switching dynamics, non-volatility, and analog characteristics of emerging memory devices, we aim to realize energy-efficient neuromorphic computing systems capable of event-driven and massively parallel information processing.

Our research focuses on the implementation of Reservoir Computing (RC), a brain-inspired computing framework well suited for processing complex temporal and sequential information. By exploiting the intrinsic nonlinear dynamics, short-term memory, and device variability of emerging electronic devices, we aim to construct compact physical reservoirs capable of efficiently transforming time-dependent input signals into high-dimensional dynamic states. This approach enables low-power and hardware-efficient processing for applications such as time-series prediction, pattern recognition, and edge intelligence.