Publications

Google Scholar - Seung hwan Lee [Link]

[20] 

[19] Justin M Correll, Seung Hwan Lee, Fuxi Cai, Vishishtha Bothra, Yong Lim, Zhengya Zhang, Wei D Lu, Michael P Flynn. “Analog Computation with RRAM and Supporting Circuits”, Analog Circuits for Machine Learning, Current/Voltage/Temperature Sensors, and High-speed Communication
(Book, Springer) (2022)

[18] Minhyung Ahn, Yongmo Park, Seung Hwan Lee, Sieun Chae, Jihang Lee, John T Heron, Emmanouil Kioupakis, Wei D Lu, Jamie D Phillips. “Memristors Based on (Zr, Hf, Nb, Ta, Mo, W) High‐Entropy Oxides”, Advanced Electronic Materials 7 (5), 2001258 (2021)

[17] Xinxin Wang, Qiwen Wang, Fan-Hsuan Meng, Seung Hwan Lee, and Wei D Lu. “Deep neural network mapping and performance analysis on tiled rram architecture”, 2020 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS) 141-144 (2020)

[16] Justin M. Correll, Vishishtha Bothra, Fuxi Cai, Yong Lim, Seung Hwan Lee, Seungjong Lee, Wei D. Lu, Zhengya Zhang, and Michael P. Flynn. “A Fully-Integrated Reprogrammable CMOS-RRAM Compute-In-Memory Coprocessor for Neuromorphic Applications”, IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 6, 36-44 (2020)

[15] Seung Hwan Lee, John Moon, YeonJoo Jeong, Xinyi Li, Huqiang Wu, and Wei D. Lu. “A quantitative, dynamic memristor/RRAM model”, ACS Applied Electronic Materials 2 (3), 701-709 (2020)

[14] Seung Hwan Lee, Xiaojian Zhu, and Wei D. Lu. “Nanoscale resistive switching devices for memory and computing applications”, Nano Research 13 (5), 1228–1243 (2020)

[13] John Moon, Wen Ma, Jong Hoon Shin, Fuxi Cai, Chao Du, Seung Hwan Lee, and Wei D. Lu. “Towards Temporal Data Classification and Forecasting Using a Memristor-Based Reservoir Computing System”, Nature Electronics 2, 480–487 (2019)

[12] Fuxi Cai *, Justin M. Correll *, Seung Hwan Lee*, Yong Lim, Vishishtha Bothra, Zhengya Zhang, Michael P. Flynn, and Wei D. Lu. “A Fully Integrated Reprogrammable Memristor-CMOS System for Neuromorphic Computing”, Nature Electronics 2, 290–299 (2019) 

[11] Qiwen Wang, Xinxin Wang, Seung Hwan Lee, Fan-Hsuan Meng, and Wei D. Lu. “A Deep Neural Network Accelerator Based on Tiled RRAM Architecture”, 2019 IEEE international electron devices meeting (IEDM), 14.4. 1-14.4. 4 (2019)

[10] Xiaojian Zhu, Seung Hwan Lee, and Wei D. Lu. “Nanoionic resistive switching devices”, Advanced Electronic Materials 5 (9), 1900184 (2019)

[9] Chao Du, Fuxi Cai, Mohammed A Zidan, Wen Ma, Seung Hwan Lee, and Wei D Lu. “Reservoir computing using dynamic memristors for temporal information processing”, Nature communications 8 (1), 2204 (2017)

[8] Yan Jun Li, Seung Hwan Lee, Yukinori Kinoshita, Zong Min Ma, Huanfei Wen, Hikaru Nomura, Yoshitaka Naitoh, and Yasuhiro Sugawara, “Growth models of coexisting p (2×1) and c (6×2) phases on an oxygen-terminated Cu (110) surface studied by noncontact atomic force microscopy at 78 K”, Nanotechnology 27 (20), 205702 (2016)

[7] J. Bamidele, S.H. Lee, Y. Kinoshita, R. Turanský, Y. Naitoh, Y.J. Li, Y. Sugawara, I. Štich, and L. Kantorovich, “Vertical atomic manipulation with dynamic atomic-force microscopy without tip change via a multi-step mechanism”, Nature Communications 5, 4476 (2014)

[6] J. Bamidele, Y. Kinoshita, R. Turanský, S. H. Lee, Y. Naitoh, Y. J. Li, Y. Sugawara, I. Štich, and L. Kantorovich, “Image formation and contrast inversion in noncontact atomic force microscopy imaging of oxidized Cu (110) surfaces”, Phys. Rev. B 90, 035410 (2014)

[5] J. Bamidele, Y. Kinoshita, R. Turanský, S. H. Lee, Y. Naitoh, Y. J. Li, Y. Sugawara, I. Štich, and L. Kantorovich, “Chemical tip fingerprinting in scanning probe microscopy of an oxidized Cu(110) surface”, Phys. Rev. B 86, 155422 (2012)

[4] Hyungdong Lee, Kim S.G., Cho, K., Hwang, H., Choi H., Lee, J., Lee, S.H., et al.; “Integration of 4F2 selector-less crossbar array 2Mb ReRAM based on transition metal oxides for high density memory applications”, 2012 Digest of Technical Papers Symposium on VLSI. pp. 151-152 (2012)

[3] Jaeyun Yi, Hyejung Choi, Seunghwan Lee, et al.; “Highly reliable and fast nonvolatile hybrid switching ReRAM memory using thin Al2O3 demonstrated at 54nm memory array”, 2011 Digest of Technical Papers Symposium on VLSI. pp. 48-49 (2011)

[2] Sang-Min Hwang, Banna S., Tang C., Bhardwaj S., Gupta M., Thurgate T., Kim D., Jungtae Kwon, Joong-Sik Kim, Seung-hwan Lee, et al.; “Offset buried metal gate vertical floating body memory technology with excellent retention time for DRAM application”, 2011 Digest of Technical Papers Symposium on VLSI. pp. 172-173 (2011)

[1] Joong-Sik Kim, Chung, Sung-Woong, Tae-Su Jang, Seung-hwan Lee, et al.; “Vertical double gate Z-RAM technology with remarkable low voltage operation for DRAM application”, 2010 Digest of Technical Papers Symposium on VLSI. pp. 163-164 (2010)

Patent

• US (Granted)
  
  

[1] Electronic device (US10056138)

[2] Electronic device and method for reading data stored in resistive memory cell (US9984748 B1)

[3] Electronic device including a semiconductor memory unit that includes cell mats of a plurality of planes vertically stacked (US9613901)

[4] Electronic device including a semiconductor memory unit that includes cell mats of a plurality of planes vertically stacked (US9377955)

[5] Variable resistance memory device and method for fabricating the same (US8933427 B2)

[6] Variable resistance memory device (US8884264 B2)

[7] Semiconductor device and method for forming the same (US8723251 B2)

[8] Semiconductor device and method for forming the same (US8318558 B2)

• South Korea and China (Granted)

[1] 전자장치 (KR102161603)

[2] 가변 저항 메모리 장치 (KR101934013)

[3] 가변 저항 메모리 장치 및 그 제조 방법 (KR101917294)

[4] 반도체 소자 및 그 형성 방법 (KR101139980)

[5] 电子装置 (CN104916311)

[6] 可变电阻存储器件 (CN103367387)