Material-Device-Circuit co-design Lab (MDCL)

Welcome to the MDCL group's webpage!

The impact of integrated circuits (ICs) on present-day society is evident in the number of electronic gadgets surrounding us. Electronic devices such as field-effect transistors (FETs) have been the critical building block in obtaining smaller, faster, and cheaper ICs for the past five decades. The dimensions of modern FETs have reached the size of a few atoms, giving rise to the various undesired quantum-mechanical phenomenons. Due to the apparent limitations of silicon-based devices, the industry has been exploring novel materials and device architectures compatible with contemporary CMOS processes. Recently, two-dimensional (2D) materials have gained considerable attention from the semiconductor community due to their atomic-scale channel thickness, which can help reduce the FET dimensions without losing the electrostatic gate control. Moreover, the tunability of the electronic properties with external stimuli such as the electric field in a stack of 2D materials opens a space to design FETs with enhanced functionalities.

The group is currently looking at the Material-Device-Circuit co-design of emerging nanoscale devices for logic and memory applications using multi-scale modeling approaches.

• At the material modeling step, we use a variety of first-principle simulation approaches, e.g., Density-Functional-Theory (DFT) to calculate the electronic properties and (ab-initio) Molecular Dynamics (MD) simulations to study the kinetics of the material system.

• For device modeling, different classical and quantum-transport simulation frameworks are employed depending on the scope of the problem. We are also actively building simple tight-binding Hamiltonian-based NEGF codes to understand the vertical transport in 2D materials heterostructures.

• We also develop physics-based analytical models of nanoscale devices validated with both simulations and reported experimental data to perform circuit simulations.