Bandwidth-Aware Operand Expansion 

Decompression-Assisted Compute Architecture 

Pipeline-Aligned Multiplier-Adder Design 

Format-Aware Dataflow Optimization 

Compression Strategy for Near-Memory Execution 

Design-for-Testability

Built-In Self-Test for Compute Units 

Real-Time Test of Compute Pipelines 

Fault Localization and Bypass-Aware Repair 

Dual-Path Accumulation for Fault Recovery 

Redundancy-Aware Repairability Design 

Design-for-Testability

Built-In Self-Test & Diagnosis

Low-Power Test Strategy

Fault Injection & Modeling

Test Pattern Generation and Compression

Repairability-Aware Architecture

Redundant PE Allocation Strategy

Built-In Self-Repair

Fault Mapping & Remapping

Runtime Error Recovery Algorithms

Compressed Test Data for 3D Memories

Periphery Logic Fault Detection

Self-Repair for Memory Arrays

Novel Architecture for Emerging Faults

Spare Row/Column Redundancy Allocation

TSV-Aware Timing Optimization

Built-In Self-Test for TSVs

TSV Repair Path Planning

Fault Localization in TSVs