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Research Interests
Research Interests
Design & Test & Repair for PiM
Design & Test & Repair for AI Accelerator
SoC Design & Test
Memory Reliability & Test
Design & Test & Repair for PiM
Design & Test & Repair for PiM
Design for PiM
Design for PiM
Bandwidth-Aware Operand Expansion
Decompression-Assisted Compute Architecture
Pipeline-Aligned Multiplier-Adder Design
Format-Aware Dataflow Optimization
Compression Strategy for Near-Memory Execution
Test & Repair for PiM
Test & Repair for PiM
Design-for-Testability
Built-In Self-Test for Compute Units
Real-Time Test of Compute Pipelines
Fault Localization and Bypass-Aware Repair
Dual-Path Accumulation for Fault Recovery
Redundancy-Aware Repairability Design
Design & Test & Repair for AI Accelerator
Design & Test & Repair for AI Accelerator
Design & Test for AI Accelerator
Design & Test for AI Accelerator
Design for Power Reduction
Design-for-Testability
Built-In Self-Test & Diagnosis
Low-Power Test Strategy
Fault Injection & Modeling
Test Pattern Generation and Compression
Repair for AI Accelerator
Repair for AI Accelerator
Repairability-Aware Architecture
Redundant PE Allocation Strategy
Built-In Self-Repair
Fault Mapping & Remapping
Runtime Error Recovery Algorithms
SoC Design & Test
SoC Design & Test
Design & Test & Diagnosis
Design & Test & Diagnosis
Test-Friendly SoC Design
Built-In Self-Test & Diagnosis
Power-Aware Test Compression
Adaptive Test Scheduling
Scan Chain Insertion & Optimization
Memory Reliability & Test
Memory Reliability & Test
Memory Reliability & Security
Memory Reliability & Security
Row Hammer Failure Mechanism Analysis
Disturbance-Aware Fault Modeling
Hardware Mitigation for Row Hammer Errors
Runtime Detection of Aggressor Rows
Reliable DRAM Controller Architecture
Memory Test & Repair
Memory Test & Repair
Memory Test Scheduling
Self-Test for Memory Arrays
Self-Repair with Row/Column Redundancy
Test Data Compression
Periphery Logic Fault Detection
TSV Test & Repair
TSV Test & Repair
TSV-Aware Timing Optimization
Built-In Self-Test for TSVs
TSV Repair Path Planning
Fault Localization in TSVs
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