Publication

Journal

[J8] Young-kyu Choi, Y. Chi, J. Lau, and J. Cong, "TARO: Automatic Optimization for Free-Running Kernels in FPGA High-Level Synthesis," Accepted for publication in IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022.

[J7] Young-kyu Choi, C. Santillana, Y. Shen, A. Darwiche, J. Cong, "FPGA Acceleration of Probabilistic Sentential Decision Diagrams with High-Level Synthesis," ACM Trans. Reconf. Tech. and Syst. (TRETS), 2022.

[J6] Young-kyu Choi, Y. Chi, J. Wang, and J. Cong, "FLASH: Fast, ParalleL, and Accurate Simulator for HLS," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 39, no. 12, pp. 4828 – 4841, Dec. 2020.

[J5] Young-kyu Choi, J. Cong, Z. Fang, Y. Hao, G. Reinman, and P. Wei, "In-depth analysis on microarchitectures of modern heterogeneous CPU-FPGA platforms," ACM Trans. Reconf. Tech. and Syst. (TRETS), vol. 12, no. 1, Feb. 2019.

[J4] Young-kyu Choi and J. Cong, "Acceleration of EM-based 3D CT reconstruction using FPGA," IEEE Trans. Biomedical Circuits and Systems (TBCAS), vol. 10, no. 3, pp. 754-767, Jun. 2016.

[J3] I. Park, M. Lee, and Young-kyu Choi, "Survey of computer vision technologies on embedded platform," The Magazine of the Institute of Electronics and Information Engineers (IEIE), vol. 39, no. 2, pp. 85-92, Feb. 2012. (Invited, in Korean)

[J2] K. You, Young-kyu Choi, J. Choi, and W. Sung, "Memory access optimized VLSI for 5,000-word continuous speech recognition," Journal of Signal Processing Systems (JSPS), vol. 63, no. 1, pp. 95-105, Apr. 2011.

[J1] Young-kyu Choi, K. You, J. Choi, and W. Sung, "A real-time FPGA-based 20,000-word speech recognizer with optimized DRAM access," IEEE Trans. Circuit and Systems (TCAS) I: Regular Papers, vol. 57, no. 8, pp. 2119-2131, Aug. 2010.

Conference

[C14] L. Song, Y. Chi, A. Sohrabizadeh, Young-kyu Choi, J. Lau, and J. Cong, "Sextans: A Streaming Accelerator for General-Purpose Sparse-Matrix Dense-Matrix Multiplication," ACM/SIGDA Int. Symp. Field-Programmable Gate Arrays (FPGA), Virtual Event, pp. 65-77, Feb. 2022.

[C13] Y. Chi, L. Guo, J. Lau, Young-kyu Choi, J. Wang, and J. Cong "Extending high-level synthesis for task-parallel programs, " in Proc. IEEE Int. Symp. Field-Programmable Custom Computing Machines (FCCM), Virtual Event, pp. 204-213, May. 2021. [The most cited paper in FCCM`21]

[C12] Young-kyu Choi, Y. Chi, W. Qiao, N. Samardzic, and J. Cong, "HBM Connect: High-Performance HLS Interconnect for FPGA HBM," ACM/SIGDA Int. Symp. Field-Programmable Gate Arrays (FPGA), Virtual Event, pp.116-126, Feb. 2021. [3rd most cited paper in FPGA`21]

[C11] Y. Chi, Young-kyu Choi, J. Cong, and J. Wang, "Rapid cycle-accurate simulator for high-level synthesis," ACM/SIGDA Int. Symp. Field-Programmable Gate Arrays (FPGA), Seaside, pp. 178-183, Feb. 2019.

[C10] Young-kyu Choi and J. Cong, "HLS-based optimization and design space exploration for applications with variable loop bounds," in Proc. IEEE/ACM Int. Conf. Computer Aided Design (ICCAD), San Diego, Nov. 2018.

[C9] Young-kyu Choi, P. Zhang, P. Li, and J. Cong, "HLScope+: Fast and accurate performance estimation for FPGA HLS," in Proc. IEEE/ACM Int. Conf. Computer Aided Design (ICCAD), Irvine, pp. 691-698, Nov. 2017.

[C8] Young-kyu Choi and J. Cong, "HLScope: High-level performance debugging for FPGA designs," in Proc. IEEE Int. Symp. Field-Programmable Custom Computing Machines (FCCM), Napa, pp. 125-128, May 2017.

[C7] Young-kyu Choi, J. Cong, Z. Fang, Y. Hao, G. Reinman, and P. Wei, "A quantitative analysis on microarchitectures of modern CPU-FPGA platforms," in Proc. Design Automation Conference (DAC), Austin, pp. 109-114, Jun. 2016. [3rd most cited paper in DAC`16]

[C6] Young-kyu Choi, J. Cong, and D. Wu, "FPGA implementation of EM algorithm for 3D CT reconstruction," in Proc. IEEE Int. Symp. Field-Programmable Custom Computing Machines (FCCM), Boston, pp. 157-160, May 2014.

[C5] Young-kyu Choi and I. Park, "GPU acceleration of graph cuts for stereo matching," Embedded Vision Workshop (EVW), Portland, pp. 642-648, Jun 2013.

[C4] Young-kyu Choi, Williem, and I. Park, "Memory-efficient belief propagation in stereo matching on GPU," Asia-Pacific Signal and Information Processing Association Annual Summit and Conference (APSIPA), Los Angeles, pp. 1-4, Dec. 2012.

[C3] Young-kyu Choi, "CUDA implementation of belief propagation for stereo vision," in Proc. IEEE Int. Conf. Intelligent Transportation Systems (ITSC), Madeira, pp.1402-1407, Sept. 2010.

[C2] Young-kyu Choi, K. You, J. Choi, and W. Sung, "VLSI for 5,000-word continuous speech recognition," in Proc. IEEE Intl. Conf. Acoustics, Speech and Signal Processing (ICASSP), Taipei, pp.557-560, Apr. 2009.

[C1] Young-kyu Choi, K. You, and W. Sung, "FPGA-based implementation of a real-time 5000-word continuous speech recognizer," in Proc. European Signal Processing Conference (EUSIPCO), Lausanne, Aug. 2008.

Ph.D. Dissertation

[D1] Young-kyu Choi, "Performance debugging frameworks for FPGA high-level synthesis," Ph.D. dissertation, University of California, Los Angeles, Oct. 2019. [Cisco Outstanding Graduate Student Research Award]

Arxiv

[A1] Young-kyu Choi, Y. Chi, J. Wang, L. Guo, and J. Cong “When HLS meets FPGA HBM: Benchmarking and bandwidth optimization,” https://arxiv.org/abs/2010.06075, Oct. 2020.