// This file is part of www.nand2tetris.org

// and the book "The Elements of Computing Systems"

// by Nisan and Schocken, MIT Press.

// File name: projects/04/Mult.asm

// Multiplies R0 and R1 and stores the result in R2.

// (R0, R1, R2 refer to RAM[0], RAM[1], and RAM[2], respectively.)

//

// This program only needs to handle arguments that satisfy

// R0 >= 0, R1 >= 0, and R0*R1 < 32768.

@sum

M=0 // Inicializa sum en 0

@R1

D=M

@count

M=D // Inicializa el conteo al valor en RAM[1]

(LOOP)

@count

D=M

@END

D;JEQ // Verifique si el conteo es 0, si es así, vaya a termina (va a END)

@R0

D=M

@sum

M=M+D // Agrega RAM[0] a la suma

@count

M=M-1 // Resta el conteo en 1

@LOOP

0;JMP // Realiza el bucle de nuevo

(END)

@sum

D=M

@R2

M=D // Escribe sum en RAM[2]

0000000000010000

1110101010001000

0000000000000001

1111110000010000

0000000000010001

1110001100001000

0000000000010001

1111110000010000

0000000000010010

1110001100000010

0000000000000000

1111110000010000

0000000000010000

1111000010001000

0000000000010001

1111110010001000

0000000000000110

1110101010000111

0000000000010000

1111110000010000

0000000000000010

1110001100001000

// This file is part of www.nand2tetris.org

// and the book "The Elements of Computing Systems"

// by Nisan and Schocken, MIT Press.

// File name: projects/04/Fill.asm

// Runs an infinite loop that listens to the keyboard input.

// When a key is pressed (any key), the program blackens the screen,

// i.e. writes "black" in every pixel;

// the screen should remain fully black as long as the key is pressed.

// When no key is pressed, the program clears the screen, i.e. writes

// "white" in every pixel;

// the screen should remain fully clear as long as no key is pressed.

// Put your code here.

(RESTART)

@SCREEN

D=A

@0

M=D //Coloca el inicio de la pantalla en RAM[0]

///////////////////////////

(KBDCHECK)

@KBD

D=M

@BLACK

D;JGT //Si se presiona alguna tecla, ennegrece

@WHITE

D;JEQ //De lo contrario blanquea la pantalla

@KBDCHECK

0;JMP

(BLACK)

@1

M=-1 //Con lo que se rellena la pantalla en el caso de que se presione tecla (-1=11111111111111)

@CHANGE

0;JMP

(WHITE)

@1

M=0 //Con lo que se rellena la pantalla en el caso contrario

@CHANGE

0;JMP

(CHANGE)

@1 //Comprueba con qué rellenar la pantalla

D=M //D contiene negro o blanco

@0

A=M //Obtiene la dirección del pixel de pantalla para rellenarlo

M=D //lo rellena

@0

D=M+1 //Siguiente pixel

@KBD

D=A-D

@0

M=M+1 //Siguiente pixel

A=M

@CHANGE

D;JGT //Si A=0 toda la pantalla se vuelve negra

@RESTART

0;JMP

0100000000000000

1110110000010000

0000000000000000

1110001100001000

0110000000000000

1111110000010000

0000000000001100

1110001100000001

0000000000010000

1110001100000010

0000000000000100

1110101010000111

0000000000000001

1110111010001000

0000000000010100

1110101010000111

0000000000000001

1110101010001000

0000000000010100

1110101010000111

0000000000000001

1111110000010000

0000000000000000

1111110000100000

1110001100001000

0000000000000000

1111110111010000

0110000000000000

1110000111010000

0000000000000000

1111110111001000

1111110000100000

0000000000010100

1110001100000001

0000000000000000

1110101010000111

// This file is part of www.nand2tetris.org

// and the book "The Elements of Computing Systems"

// by Nisan and Schocken, MIT Press.

// File name: projects/05/Memory.hdl

/**

* The complete address space of the Hack computer's memory,

* including RAM and memory-mapped I/O.

* The chip facilitates read and write operations, as follows:

* Read: out(t) = Memory[address(t)](t)

* Write: if load(t-1) then Memory[address(t-1)](t) = in(t-1)

* In words: the chip always outputs the value stored at the memory

* location specified by address. If load==1, the in value is loaded

* into the memory location specified by address. This value becomes

* available through the out output from the next time step onward.

* Address space rules:

* Only the upper 16K+8K+1 words of the Memory chip are used.

* Access to address>0x6000 is invalid. Access to any address in

* the range 0x4000-0x5FFF results in accessing the screen memory

* map. Access to address 0x6000 results in accessing the keyboard

* memory map. The behavior in these addresses is described in the

* Screen and Keyboard chip specifications given in the book.

*/

CHIP Memory {

IN in[16], load, address[15];

OUT out[16];

PARTS:

// Put your code here:

RAM16K(in=in, load=RAMLoad, address=address[0..13], out=RAMOut);

Screen(in=in, load=ScreenLoad, address=address[0..12], out=ScreenOut);

Keyboard(out=KeyboardOut);

DMux4Way(in=load ,sel=address[13..14] ,a=RAMLoadA ,b=RAMLoadB ,c=ScreenLoad);

Or(a=RAMLoadA, b=RAMLoadB, out=RAMLoad);

Mux4Way16(a= RAMOut ,b=RAMOut ,c=ScreenOut ,d=KeyboardOut ,sel=address[13..14] ,out=out );

}

// This file is part of www.nand2tetris.org

// and the book "The Elements of Computing Systems"

// by Nisan and Schocken, MIT Press.

// File name: projects/05/CPU.hdl

/**

* The Hack CPU (Central Processing unit), consisting of an ALU,

* two registers named A and D, and a program counter named PC.

* The CPU is designed to fetch and execute instructions written in

* the Hack machine language. In particular, functions as follows:

* Executes the inputted instruction according to the Hack machine

* language specification. The D and A in the language specification

* refer to CPU-resident registers, while M refers to the external

* memory location addressed by A, i.e. to Memory[A]. The inM input

* holds the value of this location. If the current instruction needs

* to write a value to M, the value is placed in outM, the address

* of the target location is placed in the addressM output, and the

* writeM control bit is asserted. (When writeM==0, any value may

* appear in outM). The outM and writeM outputs are combinational:

* they are affected instantaneously by the execution of the current

* instruction. The addressM and pc outputs are clocked: although they

* are affected by the execution of the current instruction, they commit

* to their new values only in the next time step. If reset==1 then the

* CPU jumps to address 0 (i.e. pc is set to 0 in next time step) rather

* than to the address resulting from executing the current instruction.

*/

CHIP CPU {

IN inM[16], // M value input (M = contents of RAM[A])

instruction[16], // Instruction for execution

reset; // Signals whether to re-start the current

// program (reset==1) or continue executing

// the current program (reset==0).

OUT outM[16], // M value output

writeM, // Write to M?

addressM[15], // Address in data memory (of M)

pc[15]; // address of next instruction

PARTS:

// Put your code here:

Not(in=instruction[15],out=ni);

Mux16(a=outtM,b=instruction,sel=ni,out=i);

Or(a=ni,b=instruction[5],out=intoA);

ARegister(in=i,load=intoA,out=A,out[0..14]=addressM);

And(a=instruction[15],b=instruction[12],out=AorM);

Mux16(a=A,b=inM,sel=AorM,out=AM);

ALU(x=D,y=AM,zx=instruction[11],nx=instruction[10],zy=instruction[9],ny=instruction[8],f=instruction[7],no=instruction[6],out=outtM,out=outM,zr=zr,ng=ng);

And(a=instruction[15],b=instruction[4],out=intoD);

DRegister(in=outtM,load=intoD,out=D);

And(a=instruction[15],b=instruction[3],out=writeM);

Not(in=ng,out=pos);

Not(in=zr,out=nzr);

And(a=instruction[15],b=instruction[0],out=jgt);

And(a=pos,b=nzr,out=posnzr);

And(a=jgt,b=posnzr,out=ld1);

And(a=instruction[15],b=instruction[1],out=jeq);

And(a=jeq,b=zr,out=ld2);

And(a=instruction[15],b=instruction[2],out=jlt);

And(a=jlt,b=ng,out=ld3);

Or(a=ld1,b=ld2,out=ldt);

Or(a=ld3,b=ldt,out=ld);

PC(in=A,load=ld,inc=true,reset=reset,out[0..14]=pc);

}