PROGRAM

Opening Address of WRC'2024

Christos Bouganis, João MP Cardoso, Juergen Becker 

Open source placement and routing tools for FPGAs and their extensions to multi-die FPGAs

Prof. Dirk Stroobandt

From Software Programs to Digital Circuits

Dr. Lana Josipovic

FPGA or CGRA? – Reconfigurable Architectures Suitable for High-Performance Computing

Prof. Kentaro Sano

The Space-Value-Time Challenges of Reconfigurable Accelerator Design

Prof. Georgi Gaydadjiev 

A Template for a Runtime Reconfigurable FPGA Overlay Architecture Targeting Dataflow Applications

Prof. Thilo Pionteck

New Challenges for the Reliability Evaluation of FPGA’s Accelerators in Artificial Intelligence Platforms

Prof. Luca Sterpone

Exploring Converged HPC & AI on Dataflow Architectures

Dr. Tobias Becker

PhD Forum

• Evaluation Pipeline for systematically searching for Anomaly Detection Systems, Florian Rokohl

• A Task Graph Representation for Flexible Hardware/Software Partitioning, Tiago Santos

• Improving the Energy Efficiency of CNN Inference on FPGA through Partial Reconfiguration, Zhuoer Li

• A System-Level Design Methodology for RISC-V Accelerator-Rich SoCs, Gianluca Bellocchi

 Round-Table discussion

AI, RISC-V, Open Source: Quo Vadis Reconfigurable Computing? 

Moderator

• Juergen Becker

Panel members

• Georgi Gaydadjiev, TUDelft, The Netherlands

• Martin Margala, University of Louisiana at Lafayette, USA

• Tobias Becker, Maxeler, UK

• Kentaro Sano, Riken, Japan

• Dirk Stroobandt, UGhent, Belgium 

Closing of the workshop