Publications

2019

• Understanding the Implications of Socket Density in Density Optimized Servers

M. Arora, M. Skach, W. Huang, X. An, J. Mars, L. Tang, D. Tullsen

IEEE Symposium on High-Performance Computer Architecture (HPCA), 2019

2018

• Implications of Integrated CPU-GPU processors on Thermal and Power Management Techniques

K. Dev, I. Paul, W. Huang, Y. Eckert, W. Burleson, S. Reda

arXiv:1808.09651

• Numerical Analysis of Rectangular Channel Heat Sink for Supercomputing Applications

X. An, M. Arora, W. Huang, I. Paul, B. Brantley

Thermal and Fluid Engineering Conference (TFEC-IWHF), 2018

2017

• Ti-States: Power Management in Active Timing Margin Processors

Y. Zu, W. Huang, I. Paul, V. Reddi

IEEE Micro, Top Picks from the 2016 Computer Architecture Conferences, May/June, 2017

• Dynamic GPGPU Power Management using Adaptive Model Predictive Control

A. Majumdar, L. Piga, J. Greathouse, I. Paul, W. Huang, D. Albonesi

IEEE Symposium on High-Performance Computer Architecture (HPCA), 2017

• Design and Analysis of an APU for Exascale Computing

T. Vijayaraghavan, Y. Eckert, G. Loh, M. Schulte, M. Ignatowski, B. Beckmann, W. Brantley, J. Greathouse, W. Huang, A. Karunanithi, O. Kayiran,

M. Meswani, I. Paul, M. Poremba, S. Raasch, S. Reinhardt, G. Sadowski, V. Sridharan

IEEE Symposium on High-Performance Computer Architecture (HPCA), 2017

2016

• Ti-states: Processor Power Management in the Temperature Inversion Region

Y. Zu, W. Huang, I. Paul, V. Reddi

International Symposium on Microarchitecture (MICRO), 2016

• Workload-Aware Power Gating Design and Runtime Management for Massively Parallel GPGPUs

K. Dev, S. Reda, W. Huang, I. Paul, W. Burleson

International Symposium on VLSI (ISVLSI), 2016

• Performance Boosting Opportunities under Communication Imbalance in Power-Constrained HPC Clusters

L. Piga, I. Paul, W. Huang

International Conference on Parallel Computing (ICPP), 2016

• A Framework for Evaluating Promising Power Efficiency Techniques in Future GPUs for HPC

K. Dev, I. Paul, W. Huang

High Performance Computing Symposium (HPC), 2016

• Measuring and Modeling On-Chip Interconnect Power on Real Hardware

V. Adhinarayanan, I. Paul, J. Greathouse, W. Huang, A Pattnaik, W-C Feng

IEEE International Symposium on Workload Characterization (IISWC), 2016

2015

• Harmonia: Balancing Compute and Memory Power in High Performance GPU

I. Paul, W. Huang, M. Arora, S. Yalamanchili

International Symposium on Computer Architecture (ISCA), 2015

• A Taxonomy of GPGPU Performance Scaling

J. Greathouse, A. Majumdar, A. Venugopal, I. Paul, W. Huang, G. Wu, K. Dev, L. Piga, C. Freitag, S. Puthoor

IEEE International Symposium on Workload Characterization (IISWC), 2015

2014

• PPEP: Online Performance, Power and Energy Prediction Framework and DVFS Space Exploration

B. Su, J. Gu, L. Shen, W. Huang, J. Greathouse, J. Wang

International Symposium on Microarchitecture (MICRO), 2014

2012

• Accurate Fine-Grained IBM POWER7+ Power Proxies

W. Huang, C. Lefurgy, W. Kuk, M. Floyd, A. Buyuktosunoglu, M. Allen-Ware, B. Brock, K. Rajamani

International Symposium on Microarchitecture (MICRO), 2012

• Power-Efficient Time-Sensitive Mapping in CPU/GPU Heterogeneous Systems

C. Liu, J. Li, W. Huang, J. C. Rubio, E. Speight, X. Lin

International Conference on Parallel Architectures and Compilation Techniques (PACT), 2012

• Some Limits of Power Delivery in Multicore Era

Runjie Zhang, Brett Meyer, Wei Huang, Kevin Skadron and Mircea Stan

Workshop on Energy Efficient Design (WEED, collocated with ISCA 2012)

• Processor-Memory Power Shifting for Multi-Core Systems

Heather Hanson, Wes Felter, Wei Huang, Charles Lefurgy, Karthick Rajamani, Freeman Rawson and Guillermo Silva

Workshop on Energy Efficient Design (WEED, collocated with ISCA 2012)

• Tiered Memory: an Iso-Power Memory Architecture to Address the Memory Power Wall

K. Sudan, K. Rajamani, W. Huang, F. Rawson, J. B. Carter

IEEE Transactions on Computers, 2012

• Architectural Implications of Spatial Thermal Filtering

K. Sankaranarayanan, B. H. Meyer, W. Huang, R. J. Ribando, H. Haj-Hajiri, M. R. Stan, and K. Skadron.

Elsevier Integration, the VLSI Joural, 2012

2011

• Scaling with Design Constraints - Predicting the Future of Big Chips

Wei Huang, Karthick Rajamani, Mircea Stan, Kevin Skadron

IEEE Micro, Special Issue on Big Chips, July/Aug, 2011

• (Best Paper Award) TAPO: Thermal-Aware Power Optimization Techniques for Servers and Data Centers

Wei Huang, Malcolm Allen-Ware, John Carter, Elmootazbellah Elnozahy, Hendrik Hamann, Tom Keller, Charles Lefurgy, Jian Li,

Karthick Rajamani, Juan Rubio

International Green Computing Conference (IGCC), 2011

• Temperature-Aware Architecture: Lessons and Opportunities

Wei Huang, Malcolm Allen-Ware, John B. Carter, Edmund Cheng, Kevin Skadron, Mircea Stan

IEEE Micro, May/June 31(3), 82-86, 2011

• Power Shifting in Thrifty Interconnection Network

J. Li, W. Huang, L. Zhang, C. Lefurgy, W. Denzel, R. Treumann, K. Wang

IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2011

2010

• Thermal Modeling for Processors and Systems-on-Chip (book chapter, ISBN: 978-1-4419-6174-7)

K. Skadron, M. R. Stan, W. Huang

Processor and System-on-Chip Simulation. Eds. O. Temam and R. Leupers, Springer Inc., 2010

• Temperature-to-Power Mapping

Z. Qi, B. H. Meyer, W. Huang, R. J. Ribando, K. Skadron, M. R. Stan

IEEE International Conference on Computer Design (ICCD), 2010

• Interaction of Scaling Trends in Processor Architecture and Cooling

W. Huang, M. R. Stan, S. Gurumurthi, R. J. Ribando, and K. Skadron

IEEE Semiconductor Thermal Measurement, Modeling, and Management Symposium (Semi-Therm 26), 2010

• Exploring the Thermal Impact on Manycore Processor Performance

W. Huang, K. Skadron, S. Gurumurthi, R. J. Ribando, and M. R. Stan

IEEE Semiconductor Thermal Measurement, Modeling, and Management Symposium (Semi-Therm 26), 2010

2009

• Differentiating the Roles of IR Measurement and Simulation for Power and Temperature-Aware Design

W. Huang, K. Skadron, S. Gurumurthi, R. J. Ribando, and M. R. Stan

In Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2009

2008

• Accurate, Pre-RTL Temperature-Aware Processor Design Using a Parameterized, Geometric Thermal Model

W. Huang, K. Sankaranarayanan, K. Skadron, R. J. Ribando, and M. R. Stan

IEEE Transactions on Computers 57(9), 2008

• Many-Core Design from a Thermal Perspective

W. Huang, M. R. Stan, K. Sankaranarayanan, Robert J. Ribando, and K. Skadron

ACM/IEEE Conference on Design Automation (DAC), 2008

2007

• An Improved Block-Based Thermal Model in HotSpot-4.0 with Granularity Considerations

W. Huang, K. Sankaranarayanan, R. J. Ribando, M. R. Stan, and K. Skadron.

Workshop on Duplicating, Deconstructing, and Debunking (WDDD), in conjunction with the 34th International Symposium on Computer Architecture (ISCA), 2007

• Interconnect Lifetime Prediction for Reliability-Aware Systems

Z. Lu, W. Huang, M. Stan, K. Skadron, and J. Lach

IEEE Transactions on VLSI Systems 15(2), 2007

2006

• A Design Methodology for a Low-Power, Temperature-Aware SoC Developed for Medical Image Processors

Z. Qi, W. Huang, A. Cabe, W Wu, Y Zhang, G. Rose, M. R. Stan

IEEE International System-On-Chip Conference (SOCC), 2006

• HotSpot: A Compact Thermal Modeling Method for CMOS VLSI Systems

W. Huang, M. R. Stan, K. Skadron, K. Sankaranarayanan, and S. Ghosh

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 14(5), 2006

2005

• Experiences using FPGAs for Temperature-Aware Microarchitecture Research

S. Velusamy, W. Huang, J. Lach, M. Stan, and K. Skadron

Workshop on Architecture Research using FPGA Platforms (WARFP), in conjunction with HPCA, 2005

• Parameterized Physical Compact Thermal Modeling

W. Huang, K. Skadron, and M. R. Stan

IEEE Transactions on Component Packaging and Manufacturing Technology 28(4), 2005

• The Need for a Full Chip and Package Thermal Model for Thermally Optimized IC Designs

W. Huang, E. Humenay, K. Skadron, and M. R. Stan

ACM/IEEE International Symposium on Low-Power Electronics Design (ISLPED), 2005

• Monitoring Temperature in FPGA based SoCs

S. Velusamy, W. Huang, J. Lach, M. R. Stan, and K. Skadron

IEEE International Conference on Computer Design (ICCD), 2005

• Analytical Model for Sensor Placement on Microprocessors

K.-J. Lee, K. Skadron, W. Huang

IEEE International Conference on Computer Design (ICCD), 2005

2004

• Physically-Based Compact Thermal Modeling -- Achieving Parameterization and Boundary Condition Independence

W. Huang, M. R. Stan, and K. Skadron

International Workshop on Thermal Investigations of ICs (THERMINIC), 2004

• Temperature-Aware Microarchitecture: Modeling and Implementation

K. Skadron, K. Sankaranarayanan, S. Velusamy, D. Tarjan, M.R. Stan, and W. Huang

ACM Transactions on Architecture and Code Optimization 1(1), 2004

• The Need for a Computer-Architecture Approach to Thermal Management in Computer Systems

K. Skadron, M.R. Stan, W. Huang, K. Sankaranarayanan, Z. Lu, and J. Lach

IEEE International Conference on Thermal, Mechanical and Thermo-Mechanical Simulation and Experiments in Micro- electronics and Micro-systems (EuroSimE), 2004

• Compact Thermal Modeling for Temperature-Aware Design

W. Huang, S. Ghosh, K. Sankaranarayanan, K. Skadron, and M. R. Stan

ACM/IEEE Design Automation Conference (DAC), 2004

• Interconnect Lifetime Prediction under Dynamic Stress for Reliability-Aware Design

Z. Lu, W. Huang, J. C. Lach, M. R. Stan, and K. Skadron

IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2004

2003

• HotSpot: A Dynamic Compact Thermal Model at the Processor-Architecture Level

M. R. Stan, K. Skadron, M. Barcella, W. Huang, K. Sankaranarayanan, and S. Velusamy

Microelectronics Journal: Circuits and Systems 34(12), Elsevier, 2003

• Temperature-Aware Computer Systems: Opportunities and Challenges

K. Skadron, M.R. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan, and D. Tarjan

IEEE Micro, Top Picks from the 2003 Computer Architecture Conferences, May/June 2003

• (Best Student Paper Award) Temperature-Aware Microarchitecture

K. Skadron, M. R. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan, and D. Tarjan

International Symposium on Computer Architecture (ISCA), 2003

2002

• HotSpot: Techniques for Modeling Thermal Effects at the Processor-Architecture Level

K. Skadron, M. Stan, M. Barcella, A. Dwarka, W. Huang, Y. Li, Y. Ma, A. Naidu, D. Parikh, P. Re, G. Rose, K. Sankaranarayanan, R. Suryanarayan, S. Velusamy, H. Zhang, Y. Zhang

International Workshop on Thermal Investigations of ICs (THERMINIC), 2002