FiCABU: A Fisher‑Based, Context‑Adaptive Machine Unlearning Processor for Edge AI
LoRA-Edge: Tensor-Train–Assisted LoRA for Practical CNN Fine-Tuning on Edge Devices
TT-Edge: A Hardware–Software Co-Design for Energy-Efficient Tensor-Train Decomposition on Edge AI
STARC: Crafting Low-Power Mixed-Signal Neuromorphic Processors by Bridging SNN Frameworks and Analog Designs
E-BTS: A Low-Power Event-Driven Blink Tracking System with Hardware-Software Co-Optimized Design for Real-Time Driver Drowsiness Detection
ASAP-FE: Energy-Efficient Feature Extraction Enabling Multi-Channel Keyword Spotting on Edge Processors
HH-PIM: Dynamic Optimization of Power and Performance with Heterogeneous-Hybrid PIM for Edge AI Devices
Radar-PIM: Developing IoT Processors Utilizing Processing-in-Memory Architecture for Ultra-Wideband Radar-based Respiration Detection
Day-Night Architecture: Development of an Ultra-Low Power RISC-V Processor for Wearable Anomaly Detection
Florian: Developing a Low-power RISC-V Multicore Processor with a Shared Lightweight FPU
Temporary Caching for RISC-V Multicore Platforms
TEI-inspired ULP SoC Platform
TEI-aware Dynamic Power Mangement