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LPSoC Lab.

Journal Publications

  • J Choi, E Choi, S Choi and W Lee, "E-BTS: A Low-Power Event-Driven Blink Tracking System with Hardware-Software Co-Optimized Design for Real-Time Driver Drowsiness Detection" to be published in Alexandria Engineering Journal (AEJ), (2025).

  • T Kang, K-I Oh, JJ Lee, S-E Kim, W Lee, W Oh, and S-E Kim, “Electromagnetic Interference-Robust Fingerprint Spoof Detection Based on Finger Channel Response”, to be published in IEEE Trans. on Industrial Informatics (TII), (2025).

  • J Ryu, M Kim, J Kim, M Hwang, W Lee, Y Lee, S Cho, and I-H Cho, “Design and characterization of two-terminal thyristor dynamic random-access memory with a localized lightly-doped base insertion for improving data retention”, to be published in Japanese Journal of Applied Physics (JJAP), (2025).

  • H Kwak, S Jeon, K Lee, and W Lee, “Optimizing Tensor-Train Decomposition for Efficient Edge AI: Accelerated Decoding via GEMM and Reshape Minimization”, AIMS Mathematics, 10, 7, 15755-15784, (2025).

  • J Ryu, W Lee, I Kwon, and I-H Cho, “A thyristor random access memory with localized partial insulator structure to improve retention characteristics at high temperatures”, Semiconductor Science and Technology (SST), 40, 5, 055012, (2025).

  • K Lee, S Jeon, K Lee, W Lee, and M Pedram, “Radar-PIM: Developing IoT Processors Utilizing Processing-in-Memory Architecture for Ultra-Wideband Radar-based Respiration Detection”, IEEE Internet of Things Journal (IoT-J), 12, 1, (2025).

  • E Choi, J Park, K Han, and W Lee, “AESware: Developing AES-enabled Low-Power Multicore Processors Leveraging Open RISC-V Cores with a Shared Lightweight AES Accelerator”, Engineering Science and Technology, an International Journal (JESTCH), 60, 101894, (2024).

  • S Choi and W Lee, “Developing a Grover’s Quantum Algorithm Emulator on Standalone FPGAs: Optimization and Implementation", AIMS Mathematics, 9, 11, 30939–30971, (2024).

  • H Jang, K Han, KI Oh, S Lee, JJ Lee, and W Lee, “SNN eXpress: Streamlining Low Power AI-SoC Development with the Unsigned Weight Accumulation Spiking Neural Network”, ETRI Journal, 46, 5, (2024).

  • S Jeon, K Lee, K Lee, and W Lee, "Dynamic Performance and Power Optimization with Heterogeneous Processing-in-Memory for AI Applications on Edge Devices", Micromachines, 15, 10, (2024)

  • J Park, K Han, E Choi, JJ Lee, K Lee, W Lee, and M Pedram, “Designing Low-Power RISC-V Multicore Processors with a Shared Lightweight Floating Point Unit for IoT Endnodes”, IEEE Trans. on Circuits and Systems I (TCAS-I), 71, 4106-4119, (2024).

  • E Choi, J Park, K Lee, K Han, JJ Lee, and W Lee, “Day-Night Architecture: Development of an Ultra-Low Power RISC-V Processor for Wearable Anomaly Detection”, Journal of Systems Architecture (JSA),152, (2024).

  • H Jang, S Lee, HL Park, and W Lee, “Development of a Low-power Touch-based Lifelogging Processor ”, IEEE Trans. on Circuits and Systems II (TCAS-II), 8,  3910 - 3914, (2024).

  • S Jeon, H Kwak, and W Lee, “A Study of Advancing Ultralow-Power 3D Integrated Circuits with TEI-LP Technology and AI-Enhanced PID Autotuning”, Mathematics, 12, 1-19, (2024).

  • T Kang, K-I Oh, JJ Lee, S-E Kim, W Lee, W Oh, and S-E Kim, “Anti-Spoofing for Fingerprint Recognition Using Electric Body Pulse Response”, IEEE Internet of Things Journal (IoT-J), 11, 4, (2023).

  • M Jeon, T Kang, JJ Lee, and W Lee, “A Study on the Low-power Operation of the Spike Neural Network Using the Sensory Adaptation Method”, Mathematics, 20, 1-19 (2022).

  • TW Jeong, YJ Oh, SY Chun, D Kim, W Lee, and I Cho, “Investigation of P-type High Temperature Field Effect Transistor for CMOS Logic Application”, Journal of Semiconductor Technology and Science, 20, 376-385 (2022).

  • KB Lee, J Park, E. Choi, M Jeon, and  W Lee, “Developing a TEI-Aware PMIC for Ultra-Low-Power System-on-Chips”, Energies, 15, 6780, (2022).

  • T Kang, KI Oh, H. Kim, SE Kim, KI Oh, JJ Lee, SE Kim, SE Kim, W Lee, and W. Oh, “Spiking Neural Networks-inspired Signal Detection Based on Measured Body Channel Response”, IEEE Trans. on Instrumentation and Measurement (TIM), 71, 1-16, (2022).

  • SY Lee, JH Lee,  W Lee , and Y Lee, “A Study on SRAM Designs to Exploit the TEI-aware Ultra-low Power Techniques”, Journal of Semiconductor Technology and Science, 22, 146-160, (2022).

  • H Jang, K Han, S Lee, JJ Lee, JH Lee, SY Lee, and W Lee, “Developing a Multicore Platform Utilizing Open RISC-V Cores”, IEEE Access, 9, 120010 - 120023, (2021).

  • SY Lee, JH Lee, J Lee, and W Lee, “TEI-DTA: Optimizing a Vehicular Sensor Network Operating with Ultra-Low Power System-on-Chips”, Electronics, 2, 1-15, (2021).

  • T Kang, JH  Hwang, KI Oh, H. Kim, SE Kim, KI Oh, JJ Lee, HI Park, SE Kim, W. Oh, and W Lee, “Measurement and Evaluation of Electric Signal Transmission through Human Body by Channel Modeling, System Design, and Implementation”, IEEE Trans. on Instrumentation and Measurement (TIM), 70, 1-14, (2021).

  • K Han, S Lee, KI Oh, Y Bae, H Jang, JJ Lee, W Lee, and M Pedram, “Developing TEI-aware Ultra Low Power SoC Platforms for IoT Endnodes”, IEEE Internet of Things Journal (IoT-J), 8, 4642-4656, (2021).

  • VT Dang, MG Yang, Y Shim, W Lee, and KH Baek, "An Accurate Time-Based MPPT Circuit With Two-Period Tracking Algorithm and Convergence Range Averaging Technique for IoT Applications", IEEE Access, 9, 31401-31410, (2021). 

  • T Kang, S Kim, KI Oh, JH Hwang, J Lee, H Park, K Byun, and W Lee, “Evaluation of Human Body Characteristics for Electric Signal Transmission Based on Measured Body Impulse Response”, IEEE Trans. on Instrumentation and Measurement (TIM), 69 (9), 6399-6411, (2020).

  • JM Choi, DH Yoon, DK Jung, K Seong, JS Han, W Lee, and KH Baek , “Design and Analysis of Low Power and High SFDR Direct Digital Frequency Synthesizer”, IEEE Access, 8, 67581-67590, (2020).

  • K Seong, DK Jung, DH Yoon, JS Han, JE Kim, TTH Kim, W Lee, and KH Baek, “Time-Interleaved SAR ADC with Background Timing-Skew Calibration for UWB Wireless Communication in IoT Systems”, Sensors, 20 (8), 2430, (2020).

  • W Hwang, K Yoo, DV Thai, W Lee, and KH Baek, “Design of a DC–DC Converter Customized for Ultra-Low Voltage Operating IoT Platforms”, Energies, 13 (2), 461, (2020).

  • DH Yoon, DK Jung, BY Jung, JM Choi, YJ Jo, S Lee, W Lee, and KH Baek , “LW-DEM: Designing a Low Power Digital-to-Analog Converter Using Lightweight Dynamic Element Matching Technique” IEEE Access, 112617-112628, (2019).

  • W Lee, T Kang, J Lee, K Han, J Kim and M Pedram, "TEI-ULP: Exploiting Body Biasing to Improve the TEI-Aware Ultralow Power Methods," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 9, pp. 1758-1770, (2019).

  • H Jang, K Han, S Lee, JJ Lee, and W Lee , “MMNoC: Embedding Memory Management Units into Network-on-Chip for Lightweight Embedded Systems”, IEEE Access, 7, 80011-80019, (2019).

  • YS Choi, Y Hong, and W Lee , “Current-mode Logic Driver with Two-tap Pre-emphasis using Reconfigurable Capacitive Peaking for -12.3 dB Insertion Loss”, Journal of Semiconductor Technology and Science, 19 (03), 1598-1657, (2019).

  • K Han, JJ Lee, W Lee, and J Lee, “A Diagnosable Network-on-Chip for FPGA Verification of Intellectual Properties”, IEEE Design & Test, vol. 36, no. 2, pp. 81-87, (2019).

  • K Han, J Lee, J Lee, W Lee and M Pedram, "TEI-NoC: Optimizing Ultralow Power NoCs Exploiting the Temperature Effect Inversion," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 37, no. 2, pp. 458-471 (2018).

  • J. Kim, JJ Lee, and W. Lee, "Strategic Control of 60 GHz Millimeter-Wave High-Speed Wireless Links for Distributed Virtual Reality Platforms", Mobile Information Systems, vol. (2017).

  • W Lee, K Han, Y Wang, T Cui, S Nazarian, and M Pedram, “TEI-Power: Temperature Effect Inversion-Aware Dynamic Thermal Management”, ACM Trans. on Design Automation of Electronic Systems (TODAES), 22 (3), 51, (2017).

  • IO Lee, J Kim, and W Lee, “A High-Efficient Low-Cost Converter for Capacitive Wireless Power Transfer Systems”, Energies, 10 (9), 1-14, (2017).

  • J Kim, J Lee, J Kim and W Lee, "Energy-Efficient Stabilized Automatic Control for Multicore Baseband in Millimeter-Wave Systems," IEEE Access, vol. 5, pp. 16584-16591, (2017).

  • K Han, JJ Lee, and W Lee, “Converting Interfaces on Application-specific Network-on-chip”, Journal of Semiconductor Technology and Science, 17 (4), 505-513, (2017).

  • W Lee, “Tutorial: Design and Optimization of Power Delivery Networks”, IEIE Trans. on Smart Processing & Computing, 5 (5), 349-357, (2016).

  • W Lee, Y Wang and M Pedram, "Optimizing a Reconfigurable Power Distribution Network in a Multicore Platform," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 34, no. 7, pp. 1110-1123,  (2015).

  • W Lee, Y Wang, D Shin, N Chang and M Pedram, "Optimizing the Power Delivery Network in a Smartphone Platform," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 33, no. 1, pp. 36-49, (2014).

  • Y Kim, W Lee, M Pedram, and N Chang, “Dual-mode power regulator for photovoltaic module emulation”, Applied Energy, 101, 730-739, (2013).

Conference Publications

  • K Lee, H Kwak, K Min, C Jung, S Jeon, W Lee, J Park, and M Pedram, “Radar-PIM-Lite: Ultra-Low-Power PIM Processor for Real-Time UWB Radar Respiration Detection on UAVs ”, to appear in Proc. of ACM/IEEE Int’l Symp. on Low Power Electronics and Design (ISLPED), 2025

  • J Choi, J Park, J-J Lee, M Pedram, and W Lee, “ASAP-FE: Energy-Efficient Feature Extraction Enabling Multi-Channel Keyword Spotting on Edge Processors ”, to appear in Proc. of ACM/IEEE Int’l Symp. on Low Power Electronics and Design (ISLPED), 2025

  • S Jeon, K Lee, K Lee, and W Lee, “HH-PIM: Dynamic Optimization of Power and Performance with Heterogeneous-Hybrid PIM for Edge AI Devices”, Proc. of the Design Automation Conf. (DAC), 2025 

  • K Han, H Kwak, KI Oh, S Lee, H Jang, JJ Lee, and W Lee, “STARC: Crafting Low-Power Mixed-Signal Neuromorphic Processors by Bridging SNN Frameworks and Analog Designs”, Proc. of ACM/IEEE Int’l Symp. on Low Power Electronics and Design (ISLPED), 2024

  • J Park, K Han, E Choi, K Lee, S Lee, JJ Lee, W Lee, and M Pedram, “Florian: Developing a Low-power RISC-V Multicore Processor with a Shared Lightweight FPU”, Proc. of ACM/IEEE Int’l Symp. on Low Power Electronics and Design (ISLPED), 2023

  • J Park, E Choi, K Lee, JJ Lee, K Han, and W Lee, “Developing an Ultra-low Power RISC-V Processor for Anomaly Detection”, Proc. of Design, Automation and Test in Europe (DATE), 2023

  • W Lee, J Park, C Byun, E Choi, JH Lee, W Lee, KJ Byun, and K Han, “K-means Clustering-specific Lightweight  RISC-V Processor”, Proc. of IEEE Int’l SoC Design Conf. (ISOCC), 2021

  • SY Lee, JH Lee, H Lee and W Lee, “A Framework for Detecting the Presence of an Unattended Child in a Vehicle”, Proc. of IEEE Int’l SoC Design Conf. (ISOCC), 2020

  • K Han, S Lee, JJ Lee, W Lee, and M Pedram, “TIP: A Temperature Effect Inversion-Aware Ultra-Low Power System-on-Chip Platform”, Proc. of ACM/IEEE Int’l Symp. on Low Power Electronics and Design (ISLPED), 2019.

  • YJ Mo, J Kim, JK Kim, A Mohaisen, and W Lee , “Performance of deep learning computation with TensorFlow software library in GPU-capable multi-core computing platforms”, Proc. of IEEE Int’l Conf. on Ubiquitous and Future Networks (ICUFN), 2017.

  • J Kim, YJ Mo, W Lee, and DH Nyang, “Dynamic security-level maximization for stabilized parallel deep learning architectures in surveillance applications”, Proc. of IEEE Symp. on Privacy-Aware Computing (PAC), 192-193, 2017.

  • W Lee, Y Wang, D Shin, S Nazarian, and M Pedram, “Design and optimization of a reconfigurable power delivery network for large-area, DVS-enabled OLED displays”, Proc. of ACM/IEEE Int’l Symp. on Low Power Electronics and Design (ISLPED), July 2015.

  • W Lee, Y Wang, T Cui, S Nazarian, and M Pedram, “Dynamic thermal management for FinFET-based circuits exploiting the temperature effect inversion phenomenon”, Proc. of ACM/IEEE Int’l Symp. on Low Power Electronics and Design (ISLPED), July 2014.

  • W Lee, Y Wang, and M Pedram, “VRCon: Dynamic reconfiguration of voltage regulators in a multicore platform”, Proc. of IEEE Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, March 2014.

  • D Shin, K Kim, N Chang, W Lee, Y Wang, Q Xie, and M Pedram, “Online estimation of the remaining energy capacity in mobile systems considering system-wide power consumption and battery characteristics”, Proc. of Asia and South Pacific Design Automation Conference (ASP-DAC), 59-64, Jan. 2013.

  • W Lee, Y Wang, D Shin, N Chang, and M Pedram, “Power conversion efficiency characterization and optimization for smartphones”, Proc. of ACM/IEEE Int’l Symp. on Low Power Electronics and Design (ISLPED), July 2012.

  • W Lee, Y Kim, Y Wang, N Chang, M Pedram, and S Han, “Versatile high-fidelity photovoltaic module emulation system”, Proc. of ACM/IEEE Int’l Symp. on Low Power Electronics and Design (ISLPED), Oct. 2011.

International Patents

  • W Lee, SH Lee, KJ Byun, and NW Eum, "Display device including power delivery network controller for controlling reconfigurable power delivery network for reducing power comsumption and display power management method using the display device”, US Patent 10,650,732, 2020

  • K Han, W Lee, JJ Lee, S Kang, "Network-on-chip using temperature-effect-inversion and operation method thereof", US Patent 10,326,647, 2019 

  • W Lee, S Lee, KJ Byun, and SW Kang, “Method and system for providing video”, US Patent 10,187,691, 2019

  • W Lee, JJ Lee, S Lee, HAN Kyuseung, SP Kim, and YH Bae, “Semiconductor device and operation method thereof”, US Patent 10,340,903, 2019

  • W Lee, YS Kwon, KJ Byun, JH Han, and NW Eum, “Ultra low voltage digital circuit and operation method thereof”, US Patent 9,859,889, 2018

Preprints / Unver Review / arXiv 

  • A paper on Grover's Algorithm Emulation is currently under review.

  • A paper on QAOA Emulator is currently under review.

  • A paper on Event-driven Blink Tracking System is currently under review. 

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