31st IFIP/IEEE Conference on Very Large Scale Integration (VLSI-SoC 2023), October 16 - 18, 2023, American University of Sharjah, Sharjah, UAE
Title
Head Technology Exploration Dept, Sony Semiconductor Solutions Europe (SSS-E), Sony Europe B.V. (since May 2023)
Deputy Head of Sony Sweden R&D Labs (since 2020)
Managing large R&D teams focused on semiconductor and consumer businesses primarily in the fields of sensing, positioning and communications
Experience
2020- 2023; Deputy Head of Technology Exploration Dept, SSS-E. Sony Europe. Technology Exploration Dept activities include RF Semiconductor Design, Sensor Fusion & SW Development, new radio development, telecomms system R&D, standardization for 3GPP/5G and IoT areas. New business development and Sony Developer Program also forms part of Technology Exploration Dept
2010-2020: CTO & Head of Technology Office, Semiconductor & Electronic Solutions (SES), Sony Europe. Working on 4G and 5G Telecomms, RF Semiconductor development, System Engineering and Developer Platforms
2018: Appointed as Chair of 2021 Microwave Integrated Circuits Conference, a central part of the European Microwave Conference
2017- 2020: Board member of ETSI (European Telecommunications Standards Institute)
2004-2010: Concurrent roles heading up Sony Europe LCD design centre and Sony manufacturing software solutions
2004-2010: Technology Officer, Sony Semiconductor & Electronic Solutions
2000: Appointed as Director of Sony Semiconductor Europe wireless division with responsibility for cellular phone product design and business
1997: Joined Sony as Manager for MMIC applications then in 1998 Senior Manager for wireless semiconductor development
1987-1997: Several roles relating to RF Systems & Semiconductor development. Chief design engineer at GEC Marconi III-V semiconductors, head of radio engineering at DSC Communications (now Airspan) wireless product development
1985-: BSc honours degree in physics (1985), MPhil (1987) in RF Electronics followed by PhD in RF Electronics
Research
Chris has authored and co-authored around 50 journal publications, conference presentations and workshops as well as numerous patents, mostly in the area of radio frequency design. Frequent key note speaker at RF and Telecomms conferences
Since the introduction of ChatGPT on November 30th 2022 the AI revolution became visible not only to experts but to regular IT users. Three months later the number of ChatGPT users reached 100 Mio, which made it to the fastest technology outreach in human history. ChatGPT is the most visible demonstrator of a technology, which whole potential will become visible in coming years. EDA is certainly one area, which will benefit the most from the ML technologies. In general the expectation is that Machine Learning in EDA will play for the productivity a similar role as introduction of standard cells or HDLs. There are several options how ML can be applied to EDA, the tool engines can be enhanced, but also whole design flows can be optimized and design creation could be speed-up. However, there are several traps, which a designer must be aware of. Some of them are potential copyright violations, disclosure of company secrets to the public, bugs in the generated code, also called hallucination. EDA vendors must find solutions to these problems in order to provide users secure, reliable and productive next generation tools. The next generation of designers must be taught to understand the benefits and the limits of this technology.
Mobile autonomous devices use sophisticated algorithms to automatically navigate diverse physical environments in a safe manner. Guaranteeing system safety while optimizing resource-usage of an autonomous device’s computer is an outstanding challenge. Runtime verification helps provide robustness by monitoring application execution at runtime. These systems operate in dynamic environments, requiring self-aware runtime management to maximize lifetime while enforcing safe execution. Safe execution and lifetime management require consideration of performance and efficiency, two conflicting objectives. Existing research has explored algorithmic safety guarantees, software offloading, and energy-efficient hardware, but no work has coordinated all of the approaches to maximize resource-efficiency within safety bounds. We present past and current work undergone in this domain as part of the Information Processing Factory Project, a partnership between UCI, Tech. U. Munich, and Tech. U. Braunschweig under joint funding by the US NSF and the German DFG agencies.
Fadi Kurdahi received his PhD from the University of Southern California in 1987. Since then, he has been a faculty at the Department of Electrical & Computer Engineering at UCI, where he conducts research in the areas of Computer Aided Design and design methodology of large scale systems. He served as the Associate Dean for Graduate and Professional Studies of the Samueli School of Engineering 2017-2022, and since 2012 as the Director of the Center for Embedded & Cyber-physical Systems (CECS), comprised of world-class researchers in the general area of Embedded and Cyber-physical Systems. He served on numerous editorial boards, and was program chair or general chair on program committees of several workshops, symposia and conferences in the area of CAD, VLSI, and system design. He received the best paper awards for the IEEE Transactions on VLSI in 2002, ISQED in 2006 and ASP-DAC in 2016, and other distinguished paper awards at DAC, EuroDAC, ASP- DAC and ISQED. He also received the Distinguished Alumnus award from his Alma Mater, the American University of Beirut in 2008. He is a Fellow of the IEEE and the AAAS.