FPGA Security

Field Programmable Gate Arrays (FPGAs) have become an attractive choice for diverse applications due to their reconfigurability and unique security features. However, designs mapped to FPGAs are prone to tampering, cloning, and reverse engineering of their configuration file or bitstream. These attacks could occur within the supply chain by an untrusted vendor or after deployment by a user with malicious intent. My research involves the development of various design-for-security solutions and associated CAD tools to mitigate these security issues.

Related Publications:

Hoque, T., Yang, K., Karam, R., Tajik, S., Forte, D., Tehranipoor, M., & Bhunia, S. (2020). Hidden in Plaintext: An Obfuscation-based Countermeasure against FPGA Bitstream Tampering Attacks. ACM Transactions on Design Automation of Electronic Systems, 25(1).
Karam, R., Hoque, T., Ray, S., Tehranipoor, M., & Bhunia, S. (2017). MUTARCH: Architectural diversity for FPGA device and IP security. In 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC).
Karam, R., Hoque, T., Ray, S., Tehranipoor, M., & Bhunia, S. (2016). Robust bitstream protection in FPGA-based systems through low-overhead obfuscation. In 2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE.
Hoque, T., Karam, R., & Bhunia, S. (2016). Protection of IPs mapped to FPGA against Malicious Hardware. In SRC TECHCON.

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