Takaaki Miyajima (Ph.D)

Hi, I'm Takaaki Miyajima (宮島 敬明). Thank you for accessing my personal page :)

My interests are wafer-scale computing, parallel computing, domain-specific language/hardware, particle-based simulation, and so on.
I run the High Performance Parallel Computing System Lab. within Dept. of Computer Science at Meiji University.

GitLab, LinkedIn, dblp, ORCiD, CV
問い合わせフォーム（学生さん用）
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Affiliation: 

• Lecturer, Department of Computer Science, School of Science and Technology, Meiji University.

  • Specifically I'm on level 5 of the Area 2 Building-6 in Ikuta Campus, and more specifically in  room 6508. In Japanese,  生田キャンパス 第2校舎 6号館 6508室.

Research Area and Topics:

• Parallel Processing on Heterogeneous Platforms

• Application Porting, Implementation and Optimisation on Accelerators (CPU, GPU, FPGA, and Cerebras)

• A Toolchain for Application Acceleration on Heterogeneous Platforms

• Particle-based simulation (Moving Particle Simulation Method)

• See Research page for details :)

Skills:

Computer Science

• • OPAE, Impulse C, Vivado HLS and OpenCL on FPGA

  • OpenACC, CUDA C and CUDA Fortran on GPU

  • C/C++, Fortran, Python and OpenMP on CPU

  • Binary Analysis by using Intel Pin and DTrace

  • OpenMPI, Intel TBB, OpenCV and so on

Computational Science

• • Lattice Boltzmann Method

  • Particle-based simulation (MPS, SPH)

Work Experience: 

• 2021 Apr - Current: Lecturer, Department of Computer Science, School of Science and Technology, Meiji University.

• 2018 Apr - 2021 Mar: Processor Research Team, Center for Computational Science (R-CCS), RIKEN

• 2014 Sept - 2018 Mar: Postdoctoral Researcher, Numerical Simulation Research Unit, Aeronautical Technology Directorate, Japan Aerospace Exploration Agency (JAXA)

• 2014 Apr - Present: Learning Adviser, Business Brake Through University

• 2012 Apr - 2014 Mar:  Part-time Lecturer, Applied CS Lab., School of Computer Science, Tokyo University of Technology

• 2012 Apr - 2014 Mar: Research Assistant, JST-CREST entitled "Research and Development of Unified Environment on Accelerated Computing and Interconnection for Post-Petascale Era"

• 2011 Oct - 2012 Mar: Visiting Scholar, Circuits and Systems research group, Faculty of Engineering, Department of Electrical and Electronic Engineering, Imperial College London

Education: 

• 2015 Received D.E. from Graduate School of Science and Technology, Keio University, Japan

• 2011 Received M.E. from Graduate School of Science and Technology, Keio University, Japan

• 2009 Received B.E. from School of Science and Technology, Meiji University, Japan

• 2004 Graduate Saga Nishi Highschool, Japan