Research Work

Research Activities

Reliability of digital integrated circuits.
Security of digital integrated circuits.
Soft Error Analysis and Radiation Hardening of CMOS Circuits.
QCA-based circuits.
Thermal stability of QCA designs.

Overview of the Research Title

With the evolution of technologies, data security has become a major concern in the effective and efficient development of circuits and systems. The development of various hardware hacking methods, such as side-channel attacks, makes the stored security key in the non-volatile memory accessible to the attacker. The use of devices to hold secret and sensitive information has risen significantly in recent years, and they have become indispensable in many applications. The retrieval of secret data via noninvasive side-channel attacks (SCAs) is a big and powerful threat to these devices. Reliability and security both play vital roles in respective applications and must be treated in a comprehensive manner. The resilience of any circuit and system has three major preliminaries: integrity, availability, and confidentiality. Though reliability is a blend of integrity and availability, security, on the other hand, includes all three critical aspects. The integrity of circuits and systems is affected by unreliable and insecure effects. Traditionally, IC reliability and security mechanisms have evolved in a distinct fashion, which may result in system performance degradation and significant hardware cost overhead. The unreliability caused by design and technology defects sometimes gives us opportunities to address security challenges. This work aims to blend the reliability parameters in the security primitives. It aims to design soft-error resilient circuits by optimizing the circuit arrangement so that the aging effect is minimized. A new approach for reliable circuits will be utilized for security applications with the embedded effect of soft errors. Further, the process variations in the transistors will be utilized to design the physically unclonable function (PUF). The higher the random process variations, the higher will be the security parameters of the PUF that need to be analyzed, such as bit error rate, key error rate, uniqueness, and randomness. Hence, considering the reliability and security together, we propose to develop new technologies for designing high-performance, reliable and secure integrated circuits. To this end, we designed various security circuits like leakage power attack resilient SRAM cells, Fault-Tolerant RO-PUF, and radiation-hardened RO-PUF. This research presents a flow for the designers to collectively address the reliability susceptibilities and possible security intimidation in a unified framework.