Research

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ICAS focuses on research topics related to low power analog and digital integrated circuits and systems design. 

Specific topics include, but are not limited to:
 - Neuromorphic & Machine Learning Acceleration Circuit
 - Security Circuits
 - Low Power Digital Circuits
 - Power Management Circuits
 - Energy Harvesting Circuits


Currently Sponsored Projects

        eMRAM PIM Technology for Low-Power Neural Network Accelerators                                                       Apr. 2022 ~ Dec. 2025
         (PIM인공지능반도체핵심기술개발)
        Ministry of  Science and ICT / IITP

        Highly Reliable, Extremely Low-Cost, Ultra-Low Power                                                                                          Mar. 2022 ~ Feb. 2025
        Physically Unclonable Function for Secure M2M/M2C Communication
        Basic Science Research Program (중견연구자지원사업)
        Ministry of  Science and ICT / National Research Foundation

        Development of Design Library for under 10nm Process Node                                                                           Apr. 2021 ~ Dec. 2024
         (차세대지능형반도체기술개발)
        Ministry of Trade, Industry and Energy / KEIT

        Next-Generation System Semiconductor Design Engineer Development Program                                Mar. 2021 ~ Feb. 2026
         (산업혁신인재성장지원)
        Ministry of Trade, Industry and Energy / KEIT

        Next Generation PUF Development                                                                                                                                      Sep. 2020 ~ Aug. 2025
        Samsung Electronics

        Circuit Design for ReRAM-based Near-Memory Bit-Vector Processor                                                           Jul. 2020 ~ Feb. 2023
        (신소자원천기술개발사업)
        Ministry of  Science and ICT / National Research Foundation

        Development of Future Information Processing Devices                                                                                          June 2017 ~ Feb. 2023
        Basic Research Lab. Program (기초연구실)
        Ministry of  Science and ICT  / National Research Foundation



Completed Projects

        Development of Smart Implant System for Glaucoma Treatment                                                                Nov 2019 ~ Oct. 2021
        SKKU-SMC Interdisciplinary Research Program
        Sungkyunkwan University

        Extremely Area/Cost-efficient Physically Unclonable Function for IoT Security                                       June 2019 ~ Feb. 2022
        Basic Science Research Program (중견연구자지원사업)
        Ministry of  Science and ICT / National Research Foundation

        Development of BEOL Via-integrated new device platform and application devices                              June 2019 ~ Feb. 2022
        (지능형반도체선도기술개발사업)
        Ministry of  Science and ICT  / National Research Foundation

        Energy Focusing and Harvesting Systems for IoT Sensor Networks                                                                   April 2017 ~ May 2022
        Creative Convergence Research Project (창의형융합연구사업)
        National Research Council of Science & Technology / Korea Electrotechnology Research Institute (KERI)

        High Efficiency Power Electronics IC                                                                                                                                     March 2016 ~ Feb. 2021
        (지능형반도체인력양성사업)
        Ministry of Trade, Industry and Energy

        Development of synapse-neuron devices 3D integration process                                                                       Mar. 2018 ~ Dec. 2019
        Nano-Material Fundamental Technology Development (나노소재원천기술개발사업)
        Ministry of  Science and ICT  / National Research Foundation

        Leakage-based Physically Unclonable Function for IoT Security                                                                          June 2016 ~ Feb. 2019
        Basic Science Research Program (신진연구자지원사업)
        Ministry of  Science, ICT and Future Planning / National Research Foundation

        Low Power Processor Development for Biomedical Applications                                                                        Mar. 2016 ~ Oct. 2020
        Samsung Advanced Institute of Technology (Samsung Electronics)

        IoT Sensor Platform Development                                                                                                                                           July 2015 ~ Jun 2020
        Samsung Electronics

        Energy Harvesting and Power Management IP Development for Miniature Smart Sensors               Sep. 2015 ~ Feb. 2018
        National Research Foundation / Center for Integrated Smart Sensors

Ultra-Low Power mm-Scale Sensor Platform

     

Chip Gallery

660pW Temperature Compensated Gate-leakage Based Timer for Ultra-low Power Wireless Sensor Node Synchronization

The ultra-low power sensor nodes developed so far could not utilize the wireless communication since the radio transmission power is very expensive (>0.1mW). Therefore, without accurate timing reference for communication events, radio synchronization can dominate the energy budget. With a gate-leakage based timer with temperature compensation, reasonable accuracy and temperature dependence could be achieved, bringing wireless communication between ultra-low power sensor nodes into reality. More details can be found in my 2011 ISSCC paper.

5.42nW/kB Retention Power Logic-compatible Embedded DRAM with 2T Dual-Vt Gain Cell

The most power-hungry element of ultra-low power sensor node is memory and there has been numerous effort to bring down the standby power of a memory cell. In this work, logic-compatible embedded DRAM is implemented with 2T Dual-Vt Gain Cell to achive minimum retention power among published eDRAMs. Simplified reading scheme is used to enhence array efficiency with very small number of bitcells per bit-lines, which is often common in ultra-low power sensor nodes. More details can be found in my 2010 A-SSCC paper.

Phoenix / Phoenix Core II

Phoenix processor is a 30pW-standby power sensor platform developed in my research group (published in SOVC/JSSC). I have designed a variation of this processor (called Core II internally), which has implemented extensive power gating strategy on both logic blocks and memories. I was really happy since my first taped-out chip actually worked!! (yay!!) By having low frequency (3~20 Hz) ultra-low power(<1pW) charge pump for power gating voltage generation, I could suppress the leakage power of logic blocks by 19X and memories by 30%. Standby power of original Phoenix processor (30pW) was already a new record then, and with Core II, it could be further reduced down to 20pW. More details can be found in my 2008 ESSCIRC paper.

Ultra-low Power Subthreshold Signal Processing Processor  (Design Only) 

This is my second in-class project chip design for a digital voice recorder with ultra-low power voice filtering. This was my first time to dive into "the world of sub-threshold". The key features of this project was 1) digital voice band filter implemented with custom-made sub-threshold multiplier and 2) extensive power gating strategy. Although this was a class project, I implemented this power gating strategy in real chip later which became my first paper. 

Content Addressable Memory based Network Switch (Design Only)

This was my first VLSI design  in my life. In the beginning of semester, we were learning how to lay out an inverter. So it was really exciting when we came up with something that looks like a real chip at the end of semester!!! And I was lucky to start working with my advisor during this project, who was the instructor of this class. So this project is unforgettable project for me.