Publication

International Journal:

• • M. Balasubbareddy, Sivasankaran K, Atabek E. Atamuratov, Mahkam M. Khalilloev.,Optimization of vertically stacked nanosheet FET immune to self-heating (2023) Micro and Nanostructures, 182,pp.1-14.

  • Atamuratov, A.E., Jabbarova, B.O., Khalilloev, M.M., Yusupov, A., Sivasankaran, K., Chedjou, J.C. , Impact of the channel shape, back oxide and gate oxide layers on self-heating in nanoscale JL FINFET (2022) Nanosystems: Physics, Chemistry, Mathematics, 13 (2), pp. 148-155.

• • Raju, V., Pankaj Nelapati, R., Sivasankaran, K., Impact of Device Geometrical Parameter Variation on RF Stability of SELBOX Inverted-T Junctionless FINFET (2021) Silicon, 13 (8), pp. 2605-2617, DOI: 10.1007/s12633-020-00616-w.

• • Jegadheesan, V., Sivasankaran, K., Konar, A., Optimized Substrate for Improved Performance of Stacked Nanosheet Field-Effect Transistor (2020) IEEE Transactions on Electron Devices, 67 (10), art. no. 9180358, pp. 4079-4084, DOI: 10.1109/TED.2020.3017175.

• • Jegadheesan, V., Sivasankaran, K., A source/drain-on-insulator structure to improve the performance of stacked nanosheet field-effect transistors (2020) Journal of Computational Electronics, 19 (3), pp. 1136-1143, DOI: 10.1007/s10825-020-01502-9.

• • Nelapati, R.P., Sivasankaran, K., Process Variation Study of SELBOX Inverted- T Junctionless FinFET for High-Performance Applications (2020) Silicon, 12 (7), pp. 1699-1706, DOI: 10.1007/s12633-019-00270-x.

• • Jegadheesan, V., Sivasankaran, K., Konar, A., Improved statistical variability and delay performance with junctionless inserted oxide FinFET (2020) AEU - International Journal of Electronics and Communications, 115, art. no. 153030, DOI: 10.1016/j.aeue.2019.153030.

• • Tiwari, D.L., Sivasankaran, K., NDR Behavior of a Phosphorous-Doped Double-Gate MoS2 Armchair Nanoribbon Field Effect Transistor (2020) Journal of Electronic Materials, 49 (1), pp. 551-558. DOI: 10.1007/s11664-019-07806-2.

• • Tiwari, D.L., Sivasankaran, K., Nitrogen-doped NDR behavior of double gate graphene field effect transistor (2019) Superlattices and Microstructures, 136, art. no. 106308, DOI: 10.1016/j.spmi.2019.106308.

• • Tiwari, D.L., Sivasankaran, K., Impact of carrier concentration and bandgap on the performance of double gate GNR-FET (2019) Superlattices and Microstructures, 130, pp. 38-49, DOI: 10.1016/j.spmi.2019.04.019.

• • Jegadheesan, V., Sivasankaran, K., Konar, A., Impact of geometrical parameters and substrate on analog/RF performance of stacked nanosheet field effect transistor (2019) Materials Science in Semiconductor Processing, 93, pp. 188-195, DOI: 10.1016/j.mssp.2019.01.003.

• • Divya Bharathi, N., Sivasankaran, K., Performance analysis of a substrate-engineered monolayer MoS 2 field-effect transistor (2019) Journal of Computational Electronics, 18 (1), pp. 146-154, DOI: 10.1007/s10825-018-1282-x.

• • Jegadheesan, V., Sivasankaran, K., Konar, A., Random dopant fluctuations impact reduction in 7 nm bulk-FinFET by substrate engineering (2019) International Journal of Materials and Product Technology, 59 (4), pp. 339-346. DOI: 10.1504/IJMPT.2019.104555.

• • Raju, V., Sivasankaran, K., Performance analysis of double gate junctionless tunnel field effect transistor: RF stability perspective (2019) International Journal of Advanced Computer Science and Applications, 10 (11), pp. 529-537, DOI: 10.14569/IJACSA.2019.0101172.

• • ·   Nelapati, R.P., Sivasankaran, K., Design and performance analysis of hybrid SELBOX junctionless FinFET (2019) Informacije MIDEM, 49 (1), pp. 25-32, DOI: 10.33180/InfMIDEM2019.104.

• • Raju, V., Sivasankaran, K., Impact of high k spacer on RF stability performance of double gate junctionless transistor (2019) International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, 32 (1), art. no. e2481, DOI: 10.1002/jnm.2481.

• • Divya Bharathi, N., Sivasankaran, K., Research progress and challenges of two dimensional MoS2 field effect transistors (2018) Journal of Semiconductors, 39 (10), art. no. 104002, DOI: 10.1088/1674-26/39/10/104002.

• • Divya Bharathi, N., Sivasankaran, K., Influence of metal contact on the performance enhancement of monolayer MoS2 transistor (2018) Superlattices and Microstructures, 120, pp. 479-486. DOI: 10.1016/j.spmi.2018.06.016.

• • Nelapati, R.P., Sivasankaran, K., Impact of self-heating effect on the performance of hybrid FinFET (2018) Microelectronics Journal, 76, pp. 63-68, DOI: 10.1016/j.mejo.2018.04.015.

• • Tiwari, D.L., Sivasankaran, K., Improved Performance of h-BN Encapsulated Double Gate Graphene Nanomesh Field Effect Transistor for Short Channel Length (2018) International Journal of Nanoscience, 17 (1-2), art. no. 1760016, DOI: 10.1142/S0219581X1760016X.

• • Jegadheesan, V., Sivasankaran, K., Influence of RDF and MGG induced variability on performance of 7 nm multi-gate transistors with metal/High-k gate stack (2018) ECS Journal of Solid-State Science and Technology, 7 (9), pp. Q171-Q175, DOI: 10.1149/2.0021810jss.

• • Tiwari, D.L., Sivasankaran, K., Impact of substrate on performance of band gap engineered graphene field effect transistor (2018) Superlattices and Microstructures, 113, pp. 244-254, DOI: 10.1016/j.spmi.2017.11.004.

• • Jegadheesan, V., Sivasankaran, K., RF stability performance of SOI junctionless FinFET and impact of process variation (2017) Microelectronics Journal, 59, pp. 15-21, DOI: 10.1016/j.mejo.2016.11.004.

• • Dipu, P., Sivasankaran, K., A 5 GHz, 1.2 dB NF common gate low noise amplifier using 30 nm DG-FinFET for wideband applications (2016) Indian Journal of Science and Technology, 9 (36), art. no. 36, DOI: 10.17485/ijst/2016/v9i36/102138.

• • Sivasankaran, K., Mallick, P.S., Impact of parameter fluctuations on RF stability performance of DG tunnel FET (2015) Journal of Semiconductors, 36 (8), art. no. 084001, DOI: 10.1088/1674-4926/36/8/084001.

• • Akshay, D., Sharma, S.M., Vyas, L.A., Sivasankaran, K., Design of low power and area efficient 4-bit arithmetic and logic unit using nanoscale FinFET (2015) Indian Journal of Science and Technology, 8, pp. 250-256, DOI: 10.17485/ijst/2015/v8iS2/70759.

• • Sivasankaran, K., Mallick, P.S., Bias and geometry optimization of FinFET for RF stability performance (2014) Journal of Computational Electronics, 13 (1), pp. 250-256, DOI: 10.1007/s10825-013-0507-2

• • Ahire, S., Gawali, G., Nanhe, A., Sivasankaran, K., Implementation of high data rate AMBA AHB for on Chip communication (2014) International Journal of Applied Engineering Research, 9 (20), pp. 6967-6978.

• • Sivasankaran, K., Harshavardhan, B., Venkata Ramesh, E., ASIC implementation of reverse access channel CDMA (2013) International Journal of Applied Engineering Research, 8 (13), pp. 1577-1589.

• • Sivasankaran, K., Mallick, P.S., Stability performance of optimized symmetric DG-MOSFET (2013) Journal of Semiconductors, 34 (10), art. no. 104001, DOI: 10.1088/1674-4926/34/10/104001

• • Venkataramana, B., Srikanth Reddy, P., Kishore Kumar, P., Sivasankaran, K., ASIC implementation of universal asynchronous receiver and transmitter using 45nm technology (2013) International Journal of Engineering and Technology, 5 (3), pp. 2765-2770.

  • Vyas, L., Akshay, D., Alok, J., Sivasankaran, K., RF stability performance of Junctionless Tri-Gate transistor (2013) International Journal of Applied Engineering Research, 8 (19 SPEC.ISSUE), pp. 2395-2398.

• •  Sivasankaran, K., Kannadassan, D., Seetaram, K., Mallick, P.S., Bias and geometry optimization of silicon nanowire transistor: Radio frequency stability perspective (2012) Microwave and Optical Technology Letters, 54 (9), pp. 2114-2117.DOI: 10.1002/mop.27016.

International Conference

1.     Christopher Vishal, J., Sai Sri Charan, S., Kumar, A., Sivasankaran, K., Design of Reconfigurable Multiply-Accumulate Unit with Computational Optimization (2021) Communications in Computer and Information Science, 1392, pp. 335-349. DOI: 10.1007/978-981-16-5048-2_27.

2.     Gidd, A., Ghasti, S., Jadhav, S., Sivasankaran, K., Performance Analysis of 32-Bit DADDA Multiplier Using 15–4 Compressor (2021) Communications in Computer and Information Science, 1392, pp. 19-30.  DOI: 10.1007/978-981-16-5048-2_2.

3.     Rao, L.D., Sivasankaran, K., Power grid strategies for minimum IR drop in multi power domain design (2018) 2018 3rd IEEE International Conference on Recent Trends in Electronics, Information and Communication Technology, RTEICT 2018 - Proceedings, art. no. 9012645, pp. 1196-1201, DOI: 10.1109/RTEICT42901.2018.9012645.

4.     Saji, S.A., Sivasankaran, K., Test suite for SoC interconnect verification (2017) 2017 International Conference on Microelectronic Devices, Circuits and Systems, ICMDCS 2017, 2017-January, pp. 1-6, DOI: 10.1109/ICMDCS.2017.8211606.

5.     Arya, D.N., Sivanji, K.L.V., Reddy, R., Sivanantham, S., Sivasankaran, K., A face detection system implemented on FPGA based on RCT colour segmentation (2017) Proceedings of 2016 Online International Conference on Green Engineering and Technologies, IC-GET 2016, art. no. 7916781, DOI: 10.1109/GET.2016.7916781

6.     Fernandes, F., Gupta, R., Sivanantham, S., Sivasankaran, K., Implementation of Blake 256 hash function for password encryption and parallel CRC (2016) IC-GET 2015 - Proceedings of 2015 Online International Conference on Green Engineering and Technologies, art. no. 7453820, DOI: 10.1109/GET.2015.7453820

7.     More, J., Suryavanshi, R., Dasarwar, G., Sivanantham, S., Sivasankaran, K., FPGA implementation of universal asynchronous transmitter and receiver (2016) IC-GET 2015 - Proceedings of 2015 Online International Conference on Green Engineering and Technologies, art. no. 7453796,  DOI: 10.1109/GET.2015.7453796

8.     Jeyakumar, R., Prakash, M., Sivanantham, S., Sivasankaran, K., FPGA implementation of edge detection using Canny algorithm (2016) IC-GET 2015 - Proceedings of 2015 Online International Conference on Green Engineering and Technologies, art. no. 7453798, DOI: 10.1109/GET.2015.7453798

9.     Rodi, P., Chandrakar, L., Sivanantham, S.S.G., Sivasankaran, K., Energy conservation using automatic lighting system using FPGA (2016) IC-GET 2015 - Proceedings of 2015 Online International Conference on Green Engineering and Technologies, art. no. 7453795,  DOI: 10.1109/GET.2015.7453795

10.  Niharika, S., Sali, A.S., Nithin, V., Sivanantham, S., Sivasankaran, K., Implementation of radix-4 butterfly structure to prevent arithmetic overflow (2016) IC-GET 2015 - Proceedings of 2015 Online International Conference on Green Engineering and Technologies, art. no. 7453794, DOI: 10.1109/GET.2015.7453794.

11.  Mishra, A., Sivanantham, S., Sivasankaran, K., Sine and cosine generator using CORDIC algorithm implemented in ASIC (2016) IC-GET 2015 - Proceedings of 2015 Online International Conference on Green Engineering and Technologies, art. no. 7453811, DOI: 10.1109/GET.2015.7453811

12.  Mody, J., Lawand, R., Priyanka, R., Sivanantham, S., Sivasankaran, K., Study of approximate compressors for multiplication using FPGA (2016) IC-GET 2015 - Proceedings of 2015 Online International Conference on Green Engineering and Technologies, art. no. 7453816,  DOI: 10.1109/GET.2015.7453816

13.  Khairnar, T., Harikiran, Chandgude, A., Sivanantham, S., Sivasankaran, K., Image edge detection in FPGA (2016) IC-GET 2015 - Proceedings of 2015 Online International Conference on Green Engineering and Technologies, art. no. 7453818, DOI: 10.1109/GET.2015.7453818.

14.  Katkar, P., Sridhar, T.N., Sharath, G.M., Sivanantham, S., Sivasankaran, K., VLSI implementation of fast convolution (2016) IC-GET 2015 - Proceedings of 2015 Online International Conference on Green Engineering and Technologies, art. no. 7453771, DOI: 10.1109/GET.2015.7453771

15.  Abhijeet, S.S., Vidyadhar, S.J., Gaurav, P.D., Sivanantham, S., Sivasankaran, K., A reconfigurable coprocessor units with redundant radix-4 arithmetic (2016) IC-GET 2015 - Proceedings of 2015 Online International Conference on Green Engineering and Technologies, art. no. 7453804, DOI: 10.1109/GET.2015.7453804

16.  Tiwari, A., Phapal, S., Kadam, D., Sivanantham, S., Sivasankaran, K., FPGA implementation of FFT blocks for OFDM (2016) IC-GET 2015 - Proceedings of 2015 Online International Conference on Green Engineering and Technologies, art. no. 7453805, DOI: 10.1109/GET.2015.7453805

17.  Teja, G.R., Sruthi, R.S., Tomar, K.S., Sivanantham, S., Sivasankaran, K.,Verilog implementation of fully pipelined and multiplierless 2D DCT/IDCT JPEG architecture (2016) IC-GET 2015 - Proceedings of 2015 Online International Conference on Green Engineering and Technologies, art. no. 7453819,  DOI: 10.1109/GET.2015.7453819

18.  Sharma, S., Boddu, J., Charan, G.S., Sharma, S., Sivanantham, S., Sivasankaran, K., Home automation through FPGA controller (2016) IC-GET 2015 - Proceedings of 2015 Online International Conference on Green Engineering and Technologies, art. no. 7453813,  DOI: 10.1109/GET.2015.7453813.

19.  Rana, S., Deepu, M.P., Sivanantham, S., Sivasankaran, K., Face detection system using FPGA

(2016) IC-GET 2015 - Proceedings of 2015 Online International Conference on Green Engineering and Technologies, art. no. 7453793,  DOI: 10.1109/GET.2015.7453793.

20.  Manjunath, Harikiran, V., Manikanta, K., Sivanantham, S., Sivasankaran, K., Design and implementation of 16×16 modified booth multiplier (2016) IC-GET 2015 - Proceedings of 2015 Online International Conference on Green Engineering and Technologies, art. no. 7453817,  DOI: 10.1109/GET.2015.7453817.

21.  Vyas, L., Akshay, D., Sharma, S.M., Sivasankaran, K., Kannadassan, D., Mallick, P.S., Impact of bias, doping and High-K dielectric on RF stability performance of junctionless tri-gate transistor (2015) 2nd International Conference on Electronics and Communication Systems, ICECS 2015, art. no. 7124810, pp. 1377-1380, DOI: 10.1109/ECS.2015.7124810.

22.  Reddy, N.S., Chokkakula, G., Devendra, B., Sivasankaran, K., ASIC implementation of high speed pipelined DDR SDRAM controller (2015) 2014 International Conference on Information Communication and Embedded Systems, ICICES 2014, art. no. 7033980,  DOI: 10.1109/ICICES.2014.7033980

23.  Dipu, P., Saidulu, B., Aravind, K., Raj, J.S., Sivasankaran, K., A 4-bit 9 KS/s distortionless successive approximation ADC in 180-nm CMOS technology (2015) Advances in Intelligent Systems and Computing, 324, pp. 55-63.

24.  Paunikar, A., Gavankar, R., Umarikar, N., Sivasankaran, K., Design and implementation of area efficient, low power AMBA-APB Bridge for SoC (2014) Proceeding of the IEEE International Conference on Green Computing, Communication and Electrical Engineering, ICGCCEE 2014, art. no. 6922239, DOI: 10.1109/ICGCCEE.2014.6922239

25.  Anand, N., Joseph, G., Oommen, S.S., Sivasankaran, K., ASIC implementation of a high speed error tolerant adder (2014) 2014 International Conference on Electronics and Communication Systems, ICECS 2014, art. no. 6892685,  DOI: 10.1109/ECS.2014.6892685

26.  Sivasankaran, K., Kumar Chitroju, T.R.K., Sai Anurag Reddy, K., Sai Subrahmanyam, M., Viswanath Sri Harsha, M., Mallik, P.S., Effect of gate engineering in FinFET for RF applications (2014) 2014 International Conference on Advances in Electrical Engineering, ICAEE 2014, art. no. 6838455,  DOI: 10.1109/ICAEE.2014.6838455

27.  Aravind Babu, S., Babu Ramki, S., Sivasankaran, K., Design and implementation of high speed and high accuracy fixed-width modified booth multiplier for DSP application (2014) 2014 International Conference on Advances in Electrical Engineering, ICAEE 2014, art. no. 6838565, DOI: 10.1109/ICAEE.2014.6838565

28.  Sivasankaran, K., Mallick, P.S., Chitroju, T.R.K.K., Impact of device geometry and doping concentration variation on electrical characteristics of 22nm FinFET (2013) 2013 IEEE International Conference on Emerging Trends in Computing, Communication and Nanotechnology, ICE-CCN 2013, art. no. 6528556, pp. 528-531.  DOI: 10.1109/ICE-CCN.2013.6528556

29.  Bidhul, C.B., Hampannavar, N., Joseph, S., Jayakrishnan, P., Kumaravel, S., Comparison of architectures of a coarse-grain reconfigurable multiply-accumulate unit (2013) Proceedings of the 2013 International Conference on Green Computing, Communication and Conservation of Energy, ICGCE 2013, art. no. 6823433, pp. 225-230. DOI: 10.1109/ICGCE.2013.6823433

30.  Sivasankaran, K., Mallick, P.S., A comparative study of radio frequency stability performance of double gate MOSFET and double gate tunnel FET (2013) Proceedings of the 2013 International Conference on Green Computing, Communication and Conservation of Energy, ICGCE 2013, art. no. 6823432, pp. 220-224.  DOI: 10.1109/ICGCE.2013.6823432

31.  Saluja, S., Agrawal, K., Sivasankaran, K., Bandlamudi, L., Ursu, C., Real time vehicular camera vision acquisition system using Field Programmable Gate Array (FPGA) (2013) SAE Technical Papers, 2,  DOI: 10.4271/2013-01-1340

32.  Sivasankaran, K., Pilli, K., Mallick, P.S., An analytical potential model for threshold voltage of DGMOSFET with consideration of mobile charges (2012) Proceedings of SPIE - The International Society for Optical Engineering, 8549, art. no. 85491N, DOI: 10.1117/12.924805

33.  Sivasankaran, K., Mallick, P.S., Murali, N., Kumar, K., RF and stability performance of Double Gate Tunnel FET (2012) 2012 International Conference on Emerging Electronics, ICEE 2012, art. no. 6636278, DOI: 10.1109/ICEmElec.2012.6636278.