Professional Experience :


  1. SoC Design Engineer, Intel Technology (Jul' 18 - Aug' 19)
    • Responsible for desiging ESD protection circuits on SoC level.
    • Responsible for evaluating the RSER needs for various IPs and coordinating with the teams to help them achieve the requirements.
    • Working on RV component of the SoCs and design the circuits to meet the constraints related to SH, FiSH, IR drop and EM.

2. Research Collaboration, IISc Bangalore (Supervisor - Prof. Sushobhan Avasthi)

    • A device simulator was built on MatLab for analysing the IBC structure for Perovskite Solar Cells.
    • Results were presented in IEEE-ICEE'18 conference and a Journal paper has been submitted in IEEE Journal of Photovoltaics.

3. Summer Research Intern, Quazar Technologies (Supervisor - Prof. Deshdeep Sahdev)

    • Worked on Scanning Tunneling Microscope. Learned the theory behind its working.
    • Carried out experiments to understand the IV Spectroscopy and LDOS in materials like mica, graphene and HOPG.

4. Summer Research Intern, Quazar Technologies (Supervisor - Prof. Deshdeep Sahdev)

    • Worked on Atomic Force Microscope. Learned the theory behind its working.
    • Carried out experiments which helped in getting micron scale images.
    • Built systems like Diamond Saw cutting machine and electrochemical etching system for in-house production of qtf based probes.
    • Materials like mica, ICs, graphene and biological samples like blood were analysed using the AFM and good quality images were captured.