Research

Research Area: Efficiency Improvement of Electric Vechicle (EV) Powertrain

Background

An electric vehicle (EV) powertrain typically consists of a high-voltage dc battery system, a voltage source inverter (VSI), a three-phase electric motor, and in many cases a bidirectional dc-dc converter interfacing the battery and the inverter [Fig. 1]. Power electronics for EV powertrains must focus particularly on improving the overall power conversion efficiency. This is important because a higher efficiency translates directly into an increase in the driving range, besides reduction in the size of the cooling system. In most driving cycles, including city and highway driving conditions, vehicles usually operate at less than 40% of their maximum power rating [1]. Therefore, EV powertrains are required to have high efficiencies under all load conditions, especially at intermediate and low power levels.

The VSI is a hard-switched topology, incurring considerable switching losses especially at high switching frequencies. While reducing the switching frequency can decrease the losses incurred, the harmonic performance will be worsened and the size of dc-link film capacitors will increase. Together, the heat sinks and the passive components, especially the dc-link capacitors, occupy a sizeable portion of the converter volume [2]. 

The dc-dc converter is introduced between the battery and the inverter for the following reasons:

• Independent design and optimization of the battery and the motor drive system [3].

• Improving the motor power output and speed range by boosting the dc-link voltage [4], [5].

• Reducing the switching losses in the inverter by dynamically varying the dc-link voltage, in accordance with the motor speed and load level [6], [7].

However, the dc-dc converters used in EV powertrains have only concentrated on boost operation while voltage step-down operation together with high-gain boost operation has been lacking. This limits the lower value of the variable dc-link voltage to the battery voltage, leading to unnecessary losses in the motor drive at low speeds, especially with increasing battery voltages. 

Three-Phase Unfolding Based EV Powertrain Using Voltage Balancer

In recent years, three-phase unfolding based converters have been introduced in the literature to improve the efficiency and power density of two stage dc to three-phase three-phase ac conversions. These converters employ a three-level inverter stage with fundamental frequency switching, thus eliminating the switching losses in the inverter. The overall conversion thus becomes a quasi-single stage conversion with most of the power losses occurring in the dc-dc stage. The dc-dc stage develops two varying piecewise sinusoidal dc-link voltages which are unfolded by the inverter stage. The varying nature of the dc-link voltages reduces the dc-link capacitance requirement and the dc-dc stage offers many opportunities to further improve efficiency using soft-switching techniques.

I am working on a non-isolated bidirectional buck-boost three-phase unfolding based dc-ac converter targeting EV drivetrain applications. In the proposed configuration shown in Fig. 2, the two varying dc-link voltages are produced by a cascade connection of non-inverting buck-boost (NIBB) converter and a buck/boost-type voltage balancer circuit. The three-level inverter stage is realized using a T-type inverter. The proposed circuit requires no transformer isolation to produce the series connected varying dc-links, and only four high-frequency transistors are active at a time. Further, the four high-frequency transistors are soft-switched to further reduce the power losses. Fig. 3 depicts a 5 kW hardware prototype of the unfolder based converter.  Fast switching SiC devices and compact film capacitors were used to increase converter power density. With high inductor current ripple for zero-voltage switching operation in the dc-dc stage, ferrite core inductors with Litz wires were selected to reduce the ac copper and core losses. A 5 hp, 415 V, 1500 rpm induction motor is used to test the proposed powertrain operation.

In order to produce three-phase sinusoidal voltages at the output, the dc-dc stage must develop portions of the sinusoidal voltages which will be unfolded by the inverter stage. The dc-dc stage consists of a non-inverting buck-boost (NIBB) converter followed by a buck/boost-type voltage balancer. The NIBB produces a piecewise sinusoidal, varying dc-link voltage with a six-pulse waveform in one ac fundamental frequency cycle. The voltage balancer splits into two piecewise sinusoidal voltages , varying between zero and 86% of the line voltage peak, at thrice the fundamental frequency. The ac and dc-link voltage waveforms, together with the duties of the NIBB and balancer circuit are depicted in Fig. 4 along with the fundamental frequency switching signals given to the T-type inverter.

In order to determine the component stress and converter efficiency, the various currents through the converter need to be calculated. Fig. 5 shows the current waveforms of the converter, starting from the three-phase ac currents and moving back towards the battery. The three-phase output currents are reflected in the dc-link currents by the operation of the unfolder stage. The dc-link currents and the low-frequency components of the dc-link capacitor currents are used to determine the low-frequency components of the balancer and NIBB inductor currents. The high-frequency ripples of the inductor currents are calculated using the voltage and duty cycle waveforms. The analysis shows that while the NIBB processes the full power of the system, the balancer circuit processes only a small fraction of the total power, depending on the capacitor values and power factor.

The low- and high-frequency current calculations are used to find the RMS and switching instant currents through various components which enables us to estimate the efficiency of the converter system. Fig. 6 shows the calculated and measured efficiencies of the converter at full motor speed (boost operation) and half motor speed (buck operation) with peak efficiencies above 98% in both cases. Fig. 7 shows the measured efficiency of the proposed system over the entire speed-torque region of the utilized induction machine.

Fig. 8 illustrates the experimental waveforms of the proposed converter, where the induction motor is made to follow the medium phase of Class 3 Worldwide Harmonized Light Vehicles Test Cycle (WLTC), simulating a typical drive cycle in suburban scenarios for high-power vehicles. Speed-sensorless field-oriented control based on model-reference adaptive system (MRAS) estimator was used to control the motor. Fig. 6 also shows zoomed in regions of rated speed (1500 rpm) and rated load (25 Nm). The total harmonic distortion (THD) of the line-to-line voltage is remarkably low at 1.3%.

Fig. 8  Experimentally measured waveforms of the proposed converter, operating with a 350 V dc input, demonstrating its dynamic performance. (a) The motor speed follows a standard drive cycle while the load is configured to emulate an EV load. (b)-(c) Detailed views of ac and dc waveforms during high-speed region (around 1500 rpm/50 Hz).

Input-Parallel Output-Series (IPOS) Connected Buck-Boost Converter Topologies

IPOS Symmetric Buck-Boost Converter

A modular architecture for a bidirectional buck-boost type dc-dc converter is proposed, shown in Fig. 9. It consists of an input-parallel output-series (IPOS) connection of two non-inverting buck-boost modules each of which handles a fraction of the total power with reduced stress on semiconductor devices and passive components. The converter can provide high gain voltage step-up operation as well as voltage step-down operation at high efficiencies. When the load requirement is low, overall converter efficiency can be enhanced by deactivating one of the modules.

Each non-inverting buck-boost module is operated in one of three modes:

1. In buck mode, the input side half-bridge is PWM switched while the output side half-bridge remains clamped to the output to produce a voltage less than the input voltage.

2. In boost mode, the input side half-bridge remains clamped to the input while the output side half-bridge is PWM switched to produce a voltage greater than the input voltage.

3. In pass-through mode, both half-bridges are clamped so that the module output voltage is equal to the input voltage and the module is effectively deactivated.

Whenever an output voltage less than the input voltage is required, both the modules are operated in buck mode. When voltage step-up operation is required, both modules are operated in boost mode producing a voltage gain higher than a conventional boost converter. At the same time, the inductor current and switch voltage stress is lower than a conventional boost converter leading to more efficient operation. At light loads, when low voltage gain is required, one of the modules is operated in pass-through mode to further enhance efficiency.

When both modules are operated in PWM mode, each module is controlled independently to produce the same module output voltage. The switching signals given to the two modules are phase shifted by half a switching cycle leading to reduced amplitudes and increased frequencies in the ripple waveforms of input current and output voltage. The PWM signals for each module are generated by a comparison of the controller output with two overlapped carrier signals. The overlap between the two carriers introduces a combination of buck mode and boost mode for smooth transition between the two modes.

A 5 kW all-SiC based hardware prototype of the proposed converter is pictured in Fig. 10. The prototype was switched at 100 kHz and the control strategy was implemented in the digital domain. The prototype was tested with output voltages ranging from 0 V to 800 V from an input voltage of 350 V. Fig. 11 depicts measured waveforms while the converter emulates the behavior of the dc-dc stage of an EV powertrain under a standard drive cycle. Fig. 12 shows the measured efficiencies of the converter. Peak efficiencies  of more than 98% were obtained at full load current and the converter maintains above 96% efficiency overt 10% to 100% of the maximum output power.

IPOS Asymmetric Buck-Boost Converter

Buck-boost dc-dc converter topologies have found applications in battery-power supplies, power factor correction applications, fuel-cell systems, and the dc-dc stage of EV powertrains. The non-inverting buck-boost (NIBB) shown in Fig. 13(a) is a popular choice as it offers reduced stress and high efficiency when operated in separate buck and boost modes. The switch count and efficiency of the IPOS symmetric buck-boost converter can be further improved by using two dissimilar modules connected in IPOS: a non-inverting buck-boost module and a boost module, as shown in Fig. 13(b).

Depending on the voltage gain required, the IPOS asymmetric buck-boost converter can be operated in the following operating modes:

• Buck/Pass-through mode: the non-inverting buck-boost module is operated in buck mode while the boost module is operated in pass-through mode. Overall, the converter produces voltage step-down operation having the same gain as a conventional buck converter.

• Boost/Pass-through mode: the non-inverting buck-boost module is operated in boost mode while the boost module is operated in pass-through mode. This mode produces the same voltage gain as a conventional boost converter and it is used for low gain voltage step-up operation.

• Boost/Boost mode: both the non-inverting buck-boost module and the boost module are operated in boost mode with the same duty ratio. In this case, the converter produces a voltage gain which is higher than the conventional boost converter while the voltage stress on the output side switches remains less than the output voltage. Thus lower voltage devices can be used to improve the converter efficiency.

In Table 1, the proposed converter is compared with the NIBB converter on the basis of maximum voltage gain, active switch utilization and filter size.  Both converters were designed for an output voltage range of 250-800 V from a 350 V input at 8 kW with a switching frequency of 75 kHz and same input current and output voltage ripple considerations. The proposed converter offers higher gain, better switch utilization for voltage gains more than 2.4, and lower filter energy ratings, despite higher number of components. The calculated efficiency of the proposed IPOS asymmetric converter is compared with the traditional non-inverting buck-boost (NIBB) converter as shown in Fig. 15, for output voltages of 250 V, 500 V, and 800 V. For 250 V output, the NIBB converter is operated in buck mode and the proposed converter in buck/pass-through mode. The efficiencies of the two converters at this voltage are comparable except at high output current the efficiency of the proposed converter is lower due to additional conduction losses occurring in the pass-through module. For 500 V output, the NIBB converter operates in boost mode while the proposed converter is operated in boost/pass-through mode. At this voltage, despite the additional conduction losses, the proposed converter offers better efficiency due to the lower rating devices used. For 800 V output, the NIBB continues to operate in boost mode while the proposed converter is operated in boost/boost mode. At this voltage, the proposed converter again offers better efficiency due to the lower stress on the switching devices and the lower rating devices used.

References