PMES 2017: 2nd International Workshop on Post Moore's Era Supercomputing
Held in conjunction with SC17: The International Conference for High Performance Computing, Networking, Storage and Analysis
Monday, 13 November 2017
Denver Convention Center, Room 605
In cooperation with IEEE TCHPC and ACM SIGHPC.
- Workshop URL: http://j.mp/pmes2017 (https://sites.google.com/view/pmes17/home)
- SC17 Workshop URL: http://sc17.supercomputing.org/presentation/?id=wksp109&sess=sess116
- Program: https://sites.google.com/view/pmes17/program
- CFP URL: http://j.mp/pmes2017cfp
- Submission URL (EasyChair): http://bit.ly/pmes17submit (https://easychair.org/my/conference.cgi?conf=pmes17)
- Questions: firstname.lastname@example.org
The 2nd International Workshop on Post Moore's Era Supercomputing (PMES) follows the very successful initial PMES16 workshop at SC16.
This interdisciplinary workshop is organized to explore the scientific issues, challenges, and opportunities for supercomputing beyond the scaling limits of Moore's Law, with the ultimate goal of keeping supercomputing at the forefront of computing technologies beyond the physical and conceptual limits of current systems. Continuing progress of supercomputing beyond the scaling limits of Moore's Law is likely to require a comprehensive re-thinking of technologies, ranging from innovative materials and devices, circuits, system architectures, programming systems, system software, and applications.
The workshop is designed to foster interdisciplinary dialog across the necessary spectrum of stakeholders: applications, algorithms, software, and hardware. Motivating workshop questions will include the following. "What technologies might prevail in the Post Moore's Era?" "How can applications effectively prepare for these changes through co-design?" "What architectural abstractions should be in place to represent the traditional concepts like hierarchical parallelism, multi-tier data locality, and new concepts like variable precision, approximate solutions, and resource tradeoff directives?" "What programming models might insulate applications from these changes?"
Experts from academia, government, and industry in the fields of computational science, mathematics, engineering, and computer science will have the opportunity to participate in the workshop as a presenter, panelist, or audience member. Invited speakers will provide insights and challenges from their disciplinary perspectives, while peer-reviewed position papers on promising ideas will be presented to facilitate community interaction and diversity. Panel sessions will provide opportunities for interactions across disciplines and provocative questions from the audience.
- Technology trends and predictions
- Quantum computing
- Neuromorphic and brain-inspired computing
- Probabilistic and stochastic computing
- Superconducting and cryogenic computing
- Interconnection technologies like silicon photonics and optics
- Alternative device technologies like CNT transistors
- Approximate computing
- Biological computing
- Alternative memory systems including non-volatile memory
- Beyond Von-Neumann computer architectures, including in-memory processing and memory-based computing
- Exploiting nonlinear dynamics and chaos in device behavior
- Reversible, adiabatic, and ballistic computing
- Integration of device technologies including approaches in stacking, interposers, etc.
- PMES application drivers from computational science, data intensive, deep learning
- Programming paradigms for PMES systems
- Cross-cutting topics like methodologies and tools for codesign, design automation, modeling, simulation, emulation, or benchmarking of PMES systems
Authors are invited to submit manuscripts in English structured as technical or experience papers not exceeding 6 pages of content. The 6-page limit includes figures, tables and appendices, but does not include acknowledgements or references, for which there is no page limit. Submissions must use the ACM proceedings template available at
http://www.acm.org/publications/proceedings-template, using the sample-sigconf template. (This is the same template as SC17 Technical Papers format [except the page limits].)
Submitted papers must represent original unpublished research that is not currently under review for any other venue. Papers not following these guidelines will be rejected without review. Submissions received after the due date, exceeding length limit, or not appropriately structured may also not be considered. At least one author of an accepted paper must register for and attend the workshop. Submissions are single-blind. (Author names should be included on the submission.) Papers should be submitted electronically in EasyChair at
Authors may contact the workshop organizers for more information.
- Submission site opens: May 2017
- Submission deadline: Extended to 18 Aug 2017 (was
30 June 2017) AoE
- Notification: 18 Sep 2017
- Workshop: Monday, 13 Nov 2017
The proceedings will be archived in both the ACM Digital Library and IEEE Xplore through SIGHPC.
- Satoshi Matsuoka (Tokyo Institute of Technology)
- Jeffrey S. Vetter (Oak Ridge National Laboratory)
- Keren Bergman (Columbia)
- Tom Conte (Georgia Tech)
- Franz Franchetti (Carnegie Mellon University)
- Holger Fröning (Ruprecht-Karls University of Heidelberg )
- Travis Humble (Oak Ridge National Laboratory)
- Koji Inoue (Kyushu University)
- Takeshi Iwashita (Hokkaido University)
- Georgios Michelogiannakis (Lawrence Berkeley National Laboratory)
- David Mountain (Advanced Computing Systems Research Program)
- Kengo Nakajima (University of Tokyo)
- John Shalf (Lawrence Berkeley National Laboratory)
- Osman Unsal (Barcelona Supercomputing Center)
- Richard Vuduc (Georgia Tech)
- Gerhard Wellein (University of Erlangen-Nuremberg )