[1] Chua-Chin Wang*, Tzung-Je Lee, Ya-Hsin Hsueh, Yu-Tzu Hsiao, and U Fat Chio, “Baseband Design of a Wireless Transceiver for Implantable Neural Interface, ” Inter. J. of Electrical Engineering (IJEE2004), vol. 11, no. 4, pp. 355-360, 2004. EI.
[2] Chua-Chin Wang*, Tzung-Je Lee, Yu-Tzu Hsiao, U Fat Chio, Chi-Chun Huang, Jia-Jin J. Chen, and Ya-Hsin Hsueh, “A Multi-parameter Implantable Micro-stimulator SOC,” IEEE Trans. on Very Large Scale Intgration (VLSI) System, vol. 13, no. 12, pp. 1399-1402, Dec. 2005. SCI.
[3] Chua-Chin Wang*, Tzung-Je Lee, Chi-Chen Li, and Ron Hu, “An All-MOS High Linearity Voltage-to-Frequency Converter Chip with 520 KHz/V Sensitivity,” IEEE Transactions on Circuits and Systems - II Express Briefs, vol. 53, no. 8, Aug. 2006. SCI.
[4] Chua-Chin Wang*, Tzung-Je Lee, Hoi Kam Lo, Shih-Ping Lin, and Ron Hu, “High-Sensitivity and High-Mobility Compact DVB-T Receiver for In-Car Entertainment,” IEEE Trans. on Consumer Electronics, vol. 52, no. 1, pp. 21-25, Feb. 2005. SCI.
[5] Chua-Chin Wang*, Tzung-Je Lee, Chi-Chen Li, and Ron Hu, “Voltage-to-Frequency Converter With High Sensitivity Using All-MOS Voltage Window Comparator,” Microelectronics Journal, vol. 38, no. 2, pp. 197-202, Feb. 2007. SCI.
[6] Chua-Chin Wang*, Tzung-Je Lee, U Fat Chio, Yu-Tzu Hsiao, and Jia-Jin J. Chen, “A 570-kbps ASK Demodulator Without External Capacitors for Low Frequency Bio-Implants, ” Microelectronics Journal , vol. 39, no. 1, pp. 130-136, Jan. 2008. SCI.
[7] Tzung-Je Lee, Ching-Li Lee, Yan-Jhih Ciou, Chi-Chun Huang, and Chua-Chin Wang*, “All-MOS ASK Demodulator for Low-Frequency Applications,” IEEE Transactions on Circuits and Systems II-Express Briefs, vol. 55, no. 5, pp. 474-478, May 2008. SCI.
[8] Tzung-Je Lee, and C.-C. Wang*, “A PLL with 30% Jitter Reduction Using Separate Regulators, ” VLSI Design, vol. 2008, Article ID 512946, 8 pages, 2008. doi:10.1155/2008/512946 SCI.
[9] Tzung-Je Lee, Tieh-Yen Chang, and Chua-Chin Wang*, “Wide-Range 5.0/3.3/1.8 V I/O Buffer Using 0.35-um 3.3-V CMOS Technology,” IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 56, no. 4, pp. 763-772, Apr. 2009. SCI.
[10] Chua-Chin Wang, Chia-Hao Hsu, Chi-Chun Huang, Tzung-Je Lee, Chien-Chih Hung, Ya-Hsin Hsueh, and Ron Hu, “High-PSR sync separator for TV signals,” Analog Integrated Circuits, Signal Processing, vol. 61, no. 3, pp. 279-286, Mar. 2009. SCI.
[11] Chi-Chun Huang*, Tzung-Je Lee, Wei-Chih Chang, and Chua-Chin Wang, “1/3 VDD to 3/2 VDD wide-range I/O buffer using 0.35-um 3.3-V CMOS technology,” IEEE Trans. on Circuits & Systems - II: Express Briefs, vol. 57, no. 2, pp. 126-130, Feb. 2010. SCI.
[12] Tzung-Je Lee*, “9.9V ASK Demodulator Using Differential Shaper For High-impedance Electrode, ” Circuits, Systems, and Signal Processing, CSSP, vol. 33, no. 7, pp. 2027-2042 Jun. 2014. (Digital Object Identifier: 10.1007/s00034- 014-9755-z) SCI.
[13] Tzung-Je Lee*, and Wei-Ren Lin, “VCT Protection IC for Li-Ion Battery,” Lect. Notes Electrical Eng., vol. 293, no. 81, (978-3-319-04572-6, 316724_1_En (81)), Feb, 2014. EI.
[14] Tzung-Je Lee*, Wei-Chih Hsiao, “PVT-independent dB-linear Reconfigured Local-feedback Digital Variable Gain Amplifier,” Microelectronics Journal, vol. 50, pp.20-28, Feb. 2016. (DOI information: 10.1016/j.mejo.2016.01.004) SCI.
[15] Chua-Chin Wang*, Deng-Shian Wang, Tzu-Chiao Sung, Yi-Jiw Hsieh, and Tzung-Je Lee, “A ±3.07% frequency variation clock generator implemented using HV CMOS process” Microelectronics Journal, vol. 46, no. 4, p 285-290, April 2015. (EI SCI) (ISSN: 00262692; DOI: 10.1016/j.mejo.2014.12.008; Publisher: Elsevier Ltd)
[16] Tzung-Je Lee*, and Yen-Ting Chen, “On-chip Wide Range Bidirectional Current Sensor for Li-ion Battery Management System,” Nano Devices and Sensors, Publisher: De Gruyter, Berlin, May 2016. (Germany)
[17] Chua-Chin Wang*, Tsung-Yi Tsai, Tzung-Je Lee, and Kai-Wei Ruan,“2×VDD Output Buffer with 36.4% Slew Rate Improvement Using Leakage Current Compensation, ” Electronics Letters, vol. 53, pp. 62-64, Jan, 2017. (EI, SCI)
[18] Tzung-Je Lee*, Wei-Chih Hsiao, “Delay-Time-Compensated Peak Detector for Medium-Frequency Band,” Circuits, Systems & Signal Processing (CSSP), pp. 1-17, Apr. 19, 2017. (DOI: 10.1007/s00034-017-0558-x) (SCI,EI)
[19] Tzung-Je Lee, Tsung-Yi Tsai, Wei Lin, U-Fat Chio, Member, IEEE, and Chua-Chin Wang*, “A Dynamic Leakage and Slew Rate Compensation Circuit for 40-nm CMOS Mixed-voltage Output Buffer, ” IEEE Transactions On Very Large Scale Integration Systems, (TVLSI), vol. 25, no. 11, pp. 3166-3174, Nov., 2017. (SCI)
[20] Chua-Chin Wang*, Tsung-Yi Tsai, Yu-Lin Deng, Tzung-Je Lee, “500 MHz 90-nm CMOS 2xVDD Digital Output Buffer Immunity to Process and Voltage Variations,” Circuits, Systems, and Signal Processing, (CSSP), July, 2018. (online) (SCI)
[21] Tzung-Je Lee, Tsung-Yi Tsai, Wei Lin, U-Fat Chio, and Chua-Chin Wang*, “A Slew Rate and Leakage Compensated 2×VDD I/O Buffer Using Deterministic P/N-PVT Variation Detection Method, ” IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 66, no. 1, pp. 116-120, Jan. 2019. (SCI)
[22] T.-J. Lee, S.-W. Huang, and C.-C. Wang*, “A Slew Rate Enhanced 2×VDD I/O Buffer With Precharge Timing Technique,” IEEE Transactions on Circuits and Systems-II: Express Briefs, (Paper ID: TCAS-II-05271-2019) (Accepted) (SCI)
[23] Chua-Chin Wang*, Pang-Yen Lou, Tsung-Yi Tsai, Yan-You Chou, and Tzung-Je Lee, “2×VDD 500 MHz Digital Output Buffer with Optimal Driver Transistor Sizing for Slew Rate Self-adjustment and Leakage Reduction Using 28-nm CMOS Process,” Circuits, Systems, and Signal Processing, (CSSP), vol. 40, pp. 2824-2840, Jun. 2021. (SCI)
[24] Chua-Chin Wang*, Pang-Yen Lou, Tsung-Yi Tsai, I-Yu Huang, Yu-Cheng Lin, Tzung-Je Lee, and Guan-Ru Chen, “High-accuracy Impedance Read-out Circuit for BIA-type Biomedical Sensors,” Circuits, Systems, and Signal Processing, (CSSP), vol.40, pp. 4187-4195, Sept. 2021. (SCI)
[25] C.-C. Wang*, O. L. J. A. Josea, P.-K. Su, L. K. S.Tolentino, R. G. B. Sangalang, J. S. Velascod, and T.-J. Lee, “An adaptive constant current and voltage mode P&O-based Maximum Power Point Tracking controller IC using 0.5- HV CMOS, ” Microelectronics Journal, vol. 118, pp. 1-12, Dec. 2021. (SCI)
[26] C.-C. Wang*, R. G. B. Sangalang, M.-J. Wu, T.-J. Lee, Y.-J. Chiu, L. K. S. Tolentino, and O. L. J. A. Jose, “A 2.71 fJ/conversion-step 10-bit 50 MSPS split-capacitor array SAR ADC for FOG systems,” International Journal of Electronics, Sept. 2022. (SCI)
[27] C.-C. Wang*, O. L. J. A. Jose, W.-S. Yang, R. G. B. Sangalang, L. K. S. Tolentino, and T.-J. Lee, “A 16-nm FinFET 28.8-mW 800-MHz 8-bit All-N-Transistor Logic Carry Look-Ahead Adder,” Circuits, Systems, and Signal Processing, (CSSP), Oct. 2022. (SCI)
[28] C.-C. Wang, L. K. S. Tolentino, S.-W. Lu, O. L. J. A. Jose, R. G. B. Sangalang, T.-J. Lee, P.-Y. Lou, W.-C. Chang, “A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process,” Integration, the VLSI Journal, vol. 90, pp. 245-260, May 2023. (SCI)
[29] Tzung-Je Lee*, and Kuo-Hsun Tu, “High-Sensitivity PTAT Current Generator Using PTAT and CTAT Current Subtraction Method for Temperature Sensor with Frequency-Output,” IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 70, no. 10, 3922-3926, Oct. 2023. (doi: 10.1109/TCSII.2023.3289137) (SCI)
[30] Tzung-Je Lee*, and Yu-Wei Liu, “High Efficiency Active Rectifier with Low-power Self-biased Comparator for Low-Frequency Piezoelectric Vibration Energy Harvesting of AUV,” Microelectronics Journal, vol. 146, pp. 1-8, Apr. 2024. 106137 (DOI: 10.1016/j.mejo.2024.106137) (SCI)
Conference Papers
[1] Chua-Chin Wang*, Yih-Long Tseng, Tzung-Je. Lee, and Ron Hu, Low-Variation 1.0 MHz Clock Generator with Temperature Compensation Bias," 2003 Workshop on Consumer Electronics (WCE'2003)
[2] Chua-Chin Wang*, Yih-Long Tseng, Tzung-Je Lee, and Ron Hu, “High-PSR bias circuitry for NTSC sync separation, ”in Proc. of the 2004 International Symposium on Circuits and Systems, vol. 1, pp. 329-332, May 2004.
[3] Chua-Chin Wang*, Tzung-Je Lee, Chien-Chih Hung, and Ron Hu, “High-PSR NTSC Video Sync Separator, ” on Proc. of 2004 IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS 2004), vol. 2, pp. 765-768, Dec. 2004. (Vancouver)
[4] Chua-Chin Wang*, and Tzung-Je Lee, “An 80 MHz PLL Chip with supply noise rejection using separate regulators,” Inter. Conf. on Systems and Signals (ICSS 2005), pp. 87, CD-ROM version, E-V, Apr. 2005. (Taiwan)
[5] Chua-Chin Wang*, Tzung-Je Lee, and Kuan-Wen Fang, “Dual-OPA Coil Driver for Heat Dissipation of SOC's,” 2005 The 16th VLSI Design/ CAD Symp., P1-1, CD-ROM version, Aug. 2005. (Taiwan)
[6] Chua-Chin Wang*, Tzung-Je Lee, and Sheng-Lun Tseng, “A Low-Power All-Digital Phase-Locked Loop Using Binary Frequency Searching,” 2005 International Symposium on Communications, CR-ROM version, S13-1, Nov. 2005. (Taiwan)
[7] C.-C. Wang*, C.-C. Huang, T.-J. Lee, and U.-F. Chio, “A Linear LDO Regulator with Modified NMCF Frequency Compensation Independent of Off-chip Capacitor and ESR,” 2006 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS’2006), p. 75, CD-ROM, Dec. 2006. (Singapore)
[8] C.-C. Wang*, C.-C. Huang, T.-J. Lee, Cheng-Mu Wu, Gang-Neng Sung, Kuan-Wen Fang, Sheng-Lun Tseng, and Jia-Jin Chen “An Implantable SOC Chip for Wireless Neural Micro-stimulating and Neural Signal Recording,” 2006 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS’2006), p. 63, CD-ROM, Dec. 2006. (Singapore)
[9] C.-C. Wang*. J.-J. J. Chen, C.-C. Huang, T.-J. Lee, C.-M. Wu, K.-W. Fang, G.-N. Sung, S.-L. Tseng, G.-L. Jhuang, J.-S. Jiou, J-H. Lin, Y.-J. Ciou, “Ultra-low Power Implantable Neural Signal Interface,” 2006 Inter. Symp. On Biomedical Engineering (2006 ISOBME), (accepted, paper no. 10163, Oct. 2006)
[10] Chua-Chin Wang*, Tzung-Je Lee, Chi-Chen Li, and Ron Hu, “An All-MOS High Linearity Voltage-to-Frequency Converter Chip with 520 KHz/V Sensitivity,” 2006 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS’2006), p. 39, CD-ROM, Dec. 2006. (Singapore)
[11] Tzung-Je Lee, Ching-Li Lee, Yan-Jhih Ciou, Chi-Chun Huang, and Chua-Chin Wang*, “C-less and R-less Low-Frequency ASK Demodulator for Wireless Implantable Devices,” International Symposium on Integrated Circuits 2007 (ISIC2007), pp. 604-607, Sept. 2007. (Singapore)
[12] Tzung-Je Lee, Tie-Yan Chang, and Chua-Chin Wang*, “Mixed-Voltage-Tolerant I/O Buffer Design,” International Symposium on Integrated Circuits (ISIC2007), pp. 556-559, Sept. 2007. (Singapore)
[13] Tzung-Je Lee, Wei-Chih Chang, and Chua-Chin Wang*, “Mixed-Voltage- Tolerant I/O Buffer Using a Clamping Dynamic Gate Bias Generator,” 2007 IEEE Region 10 Conference - Tencon 2007, pp. 1-4, Nov. 2007. (Taipei)
[14] Tzung-Je Lee, Yi-Cheng Liu, and Chua-Chin Wang*, “1.8 V to 5.0 V Mixed- Voltage-Tolerant I/O Buffer With 54.59% Output Duty Cycle,” 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT 2008), pp.93-96, Apr. 2008.(Hsin-Chu)
[15] Tzung-Je Lee, Wei-Chih Chang, and Chua-Chin Wang*, “Mixed-Voltage I/O Buffer Using 0.35 um CMOS Technology,” The 15th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2008), pp. 850-853, Aug., 2008. (Malta)
[16] Tzung-Je Lee, Jen-Wei Liu, Tong-Han Tsai, and Chua-Chin Wang*, “0.9 V to 5.0 V Mixed-Voltage I/O Buffer Design Using 0.18 um 1.8-V CMOS Technology,” 2008 The 19th VLSI Design/ CAD Symp. CD-ROM version, S14-6, Aug. 2008. (Taiwan)
[17] Tzung-Je Lee, Wei-Chih Hsiao, and Chua-Chin Wang*, “20 MHz Accurate Peak Detector for FPW Allergy Biosensor With Digital Calibration,” 2011 13th International Symposium on Integrated Circuits, (ISIC2011), pp. 476-479, Dec. 2011. (Singapore)
[18] Tzung-Je Lee, Wayne Luo , Shang-Hsien Yang, Ming-Hung Shih, Ko-Chi Kuo and Chua-Chin Wang*, “2.45 GHz ZigBee Receiver Frontend for HAN With Smart Meter,” 2011 13th International Symposium on Integrated Circuits, (ISIC2011), pp. 480-483, Dec. 2011. (Singapore)
[19] Tzung-Je Lee*, and Jin-Jun Ou,"4xVDD ASK Demodulator Using Standard 3.3 V CMOS Device For Implantable Biomedical Micro-stimulator," International Conference on Electronics, Communications and Control, (ICECC 2011), pp. 3470-3473, Sept. 2011. (Ningbo)
[20] Tzung-Je Lee, D. Shmilovitz, Yi-Jie Hsieh, and Chua-Chin Wang*, “Temperature and process compensated clock generator using feedback TPC bias,” 2012 IEEE International Conference on IC Design & Technology (ICICDT 2012), pp. 1-4, May 2012. (Austin)
[21] Tzung-Je Lee, Wen-Je Lu, Wei-Chih Hsiao, and Chua-Chin Wang*, "Linear Programmable Gain Amplifier Using Reconfiguration Local-Feedback Transconductors," on Proc. of 2012 IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS 2012), pp. 228-231, Dec., 2012. (Taiwan)
[22] Tzung-Je Lee*, Hsin-Chang Chen, and Wei-Ren Lin, "Wide-Range Micro-stimulator For Biomedical High-Impedance Interface," The 3rd Symposium on Engineering Medicine and Biology Applications (SEMBA2013), CD-No.: Poster 16, Feb., 2013. (Taiwan)
[23] Tzung-Je Lee*, and Hsin-Chang Chen, "Biomedical 3xVDD Current Micro-stimulator Using Standard 0.35um CMOS Process," 2013 IEEE International Conference on Circuits and Systems, (ICCAS 2013), pp. 188-191, Sept. 2013. (Kuala Lumpur, Malaysia)
[24] Tzung-Je Lee, Chia-Ming Chang, Tzu-Chiao Sung, and Chua-Chin Wang*, “A 10-bit 400-MS/s Current-Steering DAC with Process Calibration,” 2013 IEEE International Conference on Circuits and Systems, (ICCAS 2013), pp. 28-31, Sept. 2013. (Kuala Lumpur, Malaysia)
[25] Tzung-Je Lee*, and Wei-Ren Lin, “VCT Protection IC for Li-Ion Battery,” International Conference on Intelligent Technologies and Engineering Systems (icites2013), CD-ROM: P2-14, Dec., 2013. (accepted) (Kaohsiung, Taiwan) Paper ID: ICITES 2013-309, EI
[26] Tzung-Je Lee, Kai-Wei Ruan, and Chua-Chin Wang*, “32% Slew Rate and 27% Data Rate Improved 2xVDD Output Buffer Using PVTL Compensation,” 2014 IEEE International Conference on Integrated Circuit Design and Technology (ICICDT 2014), Paper ID: 33, May, 2014. (accepted). (Austin, TX, USA)
[27] Tzung-Je Lee, Wei Lin, and Chua-Chin Wang*, "Slew Rate Improved 2×VDD Output Buffer Using Leakage and Delay Compensation," 2014 IEEE Inter. Conf. on Electron Devices and Solid-State Circirts, (EDSSC 2014), Paper ID: P0072, 2014. (accepted) (Chengdu, China)
[28] Tzung-Je Lee*, and Yen-Ting Chen, “Bidirectional Battery Current Sensor for Wearable Medical Devices,” 2015 Symp. On Engineering, Medicine and Biology Applications (SEMBA2015), CD-No.: B005, Feb. 2015.
[29] Tzung-Je Lee*, and Yen-Ting Chen, “On-chip ± 1.0-A Wide Range Bidirectional Current Sensor for Li-ion Battery Management System,” The 4th International Symposium on Next-Generation Electronics, (ISNE 2015), Paper ID: 270044, May 2015. (Taipei), EI
[30] Tzung-Je Lee*, Wun-Cing Yu, and You-Ting Liu, “16 Series Li-ion Battery Cells Current Sensor,” 2016 IEEE International Conference on Consumer Electronics Taiwan (ICCE-TW 2016), pp. 1-2, DOI: 10.1109/ICCE-TW.2016.7520898, May 2016.
[31] Tzung-Je Lee*, and You-Ting Liu, “SOC Estimation and Temperature Detection System for Li-ion Battery,” The 27th VLSI Design/CAD Symposium, (VLSICAD2016), Paper no.: 0110, Aug. 2016.
[32] Tzung-Je Lee*, “HV Switch Using Differential Voltage Shaping Driver for 13 Series Li-ion Battery Cells BMS,” 13th International SoC Design Conference (ISOCC2016), pp. 353-354, Oct. 2016. (Paper ID: PS-53) (Jiju, Korea)
[33] Chua-Chin Wang*, Tsung-Yi Tsai, Yu-Lin Deng, and Tzung-Je Lee, "2 × VDD 28-nm CMOS digital output buffer using low-Vth transistors for slew rate adjustment," 2017 7th International Conference on Integrated Circuits, Design, and Verification (ICDV), pp. 22-27, Oct. 2017.
[34] Tzung-Je Lee*, and Guan-Jhang Li “HV Voltage Sensor for 16 Series Li-ion Battery CellsUsing Chopper Stabilized Amplifier,” 2017 International SoC Design Conference (ISOCC2017), pp. 196-197, Nov. 2017. (Seoul, Korea)
[35] Tzung-Je Lee*, and Guan-Jhang Li, “On Chip 4-Series Li-ion Battery Equalizer Using One Inductor,” The 29th VLSI Design/CAD Symposium, (VLSICAD2018), Paper no.: S0193, Aug. 2018.
[36] Tzung-Je Lee, Chia-Hsin Hsu, and Chua-Chin Wang*, “High Efficiency Buck Converter with Wide Load Current Range Using Dual-mode of PWM and PSM,” 2019 International Symposium on Circuits and Systems (ISCAS2019), 2019.(Paper ID: 1891)
[37] Tzung-Je Lee*, and Chih-Yuan Chang, “Single-inductor dual outputs buck-boost converter with dual switches,” 2019 9th International Conference on Power and Energy Systems (ICPES2019), pp. 1-4, Dec. 2019.
[38] Tzung-Je Lee, Po-Kai Su, and Chua-Chin Wang*, “20V HV Energy Harvesting Circuit with ACC/CV Mode and MPPT Control for a 5 W Solar Panel, ” 2020 2nd International Conference on Smart Power & Internet Energy Systems (SPIES2020), pp. 205-208, Sept., 2020.
[39] Tzung-Je Lee, Chih-Kai Wang, and Chua-Chin Wang*, “4.15 W SIDO Buck Converter with Low Cross Regulation Using Adaptive PCCM Control, ” 2020 2nd International Conference on Smart Power & Internet Energy Systems (SPIES2020), pp. 442-445, Sept., 2020.
[40] T.-J. Lee, M.-J. Wu, Y.-J. Chiu and C.-C. Wang*, “A 10-bit 50-MS/s SAR ADC with Split-Capacitor Array Using Unity-Gain Amplifiers Applied in FOG Systems,” 2021 IEEE 4th International Conference on Electronics Technology (ICET2021), pp. 356-359, May 2021.
[41] T.-J. Lee*, and Y.-W. Liu, “12 V PZE harvesting circuit for AUV using boost converter with resistor matching controller,” 2021 International SoC Design Conference (ISOCC2021), pp. 133-134, Oct. 2021.
[42] T.-J. Lee, W.-S. Yang and C.-C. Wang*, “A 20 GHz 8-bit All-N-Transistor Logic CLA Using 16-nm FinFET,” 2021 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS2021), pp. 33-36, Nov. 2021.
[43] T.-J. Lee, B.-H. Liao and C.-C. Wang*, “Wide Lock-in Range CDR with Modified DQFD and Coarse-fine Tuning Technique, ” International Conference on Integrated Circuit Design and Technology 2022 (ICICDT 2022), pp. 61-64, Sept, 2022. (Hanoi, Vietnam), EI
[44] T.-J. Lee*, and K.-H. Tu, “Wide Dynamic Range Temperature Sensor Using High Sensitivity PTAT Current Generator,” 19th International SoC Design Conference (ISOCC2022), pp. 17-18, Oct. 2022 .
[45] T.-J. Lee*, and H.-H. Chang, “Fast-Transient LDO Regulator with RC-less Low-Impedance Buffer and PVT Compensation,” 19th International SoC Design Conference (ISOCC2022), pp. 11-12, Oct. 2022
[46] T.-J. Lee, W.-J. Su, L. K. S. Tolentino, and C.-C. Wang*, “A 2.5-GHz 2×VDD 16-nm FinFET digital output buffer with slew rate and duty cycle self-adjustment,” 2021 IEEE Asia Pacific Conf. on Circuits and Systems (2021 APCCAS), pp. 153-156, Nov. 2021. (Malaysia)
[47] Tzung-Je Lee*, and Shih-Hsien Kuo, “3.2 Gbps Output Driver with Dual Low Voltage Modes and Low Power PVT Compensation Circuit,” 2023 International Symposium on Circuits and Systems (ISCAS2023), pp. 1-4, May 2023. (Monterey, USA)
[48] Tzung-Je Lee*, and Ding-Ze Chang, “91.282% Efficiency SIDO Buck-Buck Converter with Separate Positive and Negative Output Voltage in 40 nm CMOS Process,” 2023 International Symposium on Circuits and Systems (ISCAS2023), pp. 1-4, May, 2023. (Monterey, USA)
[49] Tzung-Je, Lee*, and Meng-Lin Tsai, “A High Dynamic-Range Readout Circuit with Differential Resistance-to-Time Conversion for Gas Sensor,” 21st IEEE Interregional NEWCAS Conference, (NEWCAS, 2023). pp. 1-4, Jun. 2023. (Edinburgh, Scotland)
[50] Tzung-Je, Lee*, and Hsieng-Han Chen, “±3 A Bidirectional Current Sensor for 57.6 V Li-ion Battery Management System of AUV,” 2023 IEEE International Conference on Consumer Electronics Taiwan (ICCE-TW 2023), pp. 277-278, Jul., 2023. (Ping-Tong, Taiwan)
[51] Tzung-Je, Lee*, Yu-Wei Liu, and Yu-Cheng Lin, “Real-time IR Image Processing Interface on FPGA with Histogram Equalization and Non-Uniform Correction,” 2023 IEEE International Conference on Consumer Electronics Taiwan (ICCE-TW 2023), pp. 709-710, Jul., 2023. (Ping-Tong, Taiwan)
[52] Tzung-Je, Lee*, and Yi-Ting Deng, “On-Chip Current-Mode Communication Circuits for Stackable Li-ion Battery Management System Using 0.18μm BCD HV Process,” Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA-Asia 2023), pp. 1-4, Aug. 2023. (Hsin-Chu, Taiwan) (Best Student Poster Award)
[53] Tzung-Je Lee*, and Kuo-Hsun Tu, “10-bit 250-KS/s M-2M Digital-to-Analog Converter with 4-4-2 Segmentation for Sonar System,” 20th International SoC Design Conference (ISOCC2023), pp. 95-96, 20203. Oct. 2023. (Jeju, Korea)
[54] Tzung-Je Lee*, and Yin-Wen Lo, “Temperature Sensor with 292.3 nA/oC Sensitivity Using Double Current Subtraction,” 20th International SoC Design Conference (ISOCC2023), pp. 49-50, Oct. 2023. (Jeju, Korea) (Siliconmitus Paper Award)
[55] Tzung-Je Lee*, Hung-Hsiang Chang, and Chien-Hsiang Chao, “High Bandwidth Efficiency FPGA-based Underwater Acoustic Transceiver with Adaptive-SFDR DDFS,” 20th International SoC Design Conference (ISOCC2023), pp. 39-40, Oct. 2023. (Jeju, Korea)
[56] Tzung-Je Lee*, and Mohammad Rizwan, “On-chip low offset and low noise Li-ion battery voltage sensor using Chopper stabilization technique for AUV,” 2023 IEEE 5th Eurasia Conference on IoT, Communication and Engineering (IEEE ECICE 2023), pp. 237-240, Oct. 2023. (Yunlin, Taiwan) (Best Conference Paper Award)
[57] 李宗哲*，張宏祥，趙建翔，“基於FPGA與自適應SFDR直接數位頻率合成器之高頻寬效率水下聲學傳接器，”第45屆海洋工程研討會，2023 (基隆，台灣)
[58] Tzung-Je Lee*, and Ji-Hau Chiou, “A 3.2-GHz 0.3/0.5 V 16-nm FinFET I/O Buffer With Low-Power PVT Compensation Circuit,” 2024 International Symposium on Circuits and Systems (ISCAS2024), pp. 1-5, May 2024. (Singapore)
[59] Tzung-Je Lee*, and Ju-Heng Chen, “A 66.077-mW Output-Power PZE Energy Harvesting Circuit with Boost Converter Using Impedance Matching PWM/PFM Control,” 14th IEEE Symposium on Computer Applications & Industrial Electronics (ISCAIE 2024), pp. 27-30, May 2024. (Penang Island, Malaysia)
[60] Tzung-Je Lee*, and Jin-Yi Chen, “A Capacitor-Less Low-Dropout Regulator with PVT Compensated Adaptive Biasing,” 14th IEEE Symposium on Computer Applications & Industrial Electronics (ISCAIE 2024), pp. 68-71, May 2024. (Penang Island, Malaysia)
[61] Tzung-Je Lee*, and Po-Hsuan Hsiao, “Low-Power Frequency-Mode Temperature Sensing Circuit with Subthreshold Operational Amplifier,” 21th International SoC Design Conference (ISOCC2024), pp. 284-285, Aug. 2024. (Sapporo, Japan)
[62] Tzung-Je Lee*, and Han-Yi Chiu, “A Cap-less LDO Regulator with Improved Load Regulation using Adaptive Feedback Control and Modified Voltage Damper,” 21th International SoC Design Conference (ISOCC2024), pp. 9-10, Aug. 2024. (Sapporo, Japan)
[63] Tzung-Je Lee*, and Cheng-Han Wu, “Optimal Efficiency True Random Number Generator with Discrete-time Chaos for Low-Cost Applications,” 21th International SoC Design Conference (ISOCC2024), pp. 15-16, Aug. 2024. (Sapporo, Japan)
[64] Tzung-Je Lee*, Ruei-Chi Lai, Aleksandr Vasjanov, Vaidotas Barzdėnas, “A 23.9 ppm/°C Bandgap Reference Circuit with Wide Temperature Range Using Subthreshold PVT Detector,” 2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS2024), pp. 265-268, Nov. 2024. (Taipei, Taiwan)
[65] Tzung-Je Lee*, and Chien-Hsiang Chao, “A High Gain Range Low Gain Step dB-Linear Programmable Gain Amplifier with Parallel Complementary Switching Current Method,” 2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS2024), pp. 7336-739, Nov. 2024. (Paper ID: 9270, accepted) (Taipei, Taiwan)
[66] Tzung-Je Lee*, and Zi-Yi Huang, “Chopper Stabilized Capacitive-Coupled Instrumentation Amplifier for Pulmonary Artery Pressure Monitoring System,”2025 Symposium on Engineering, Medicine, and Biology Applications (SEMBA 2025), pp. 1-2, Jan. 2025. (Kaohsiung, Taiwan)
[67] Tzung-Je Lee*, and Ji-Hau Chiou, “A 1.91 fJ/conversion-step 10-bit Asynchronous SAR ADC for Applications of Implantable Biomedical Pressure Measuring,”2025 Symposium on Engineering, Medicine, and Biology Applications (SEMBA 2025), pp. 1-2, Jan. 2025. (Kaohsiung, Taiwan, 2025/01/11-12) Best Poster Award
[68] Tzung-Je Lee*, Yi-Ting Deng, and Jyu-Heng Chen, “98.9% Efficiency Fully-integrated GaN Driver for Underwater Wireless Charging Application,” 2025 International Symposium on Circuits and Systems (ISCAS2025), pp. 1-4, May 2025. (London, England, 05/25-28)
[69] Tzung-Je Lee*, Shih-Hsien Kuo, Ji-Hau Chiou, Chua-Chin Wang, and Friedel Gerfers, “A Low-Power 10-bit 72 MS/s Continuous Successive-Approximation Analog-to-Digital Converter,” 9th Open International Conference "Electrical, Electronic and Information Sciences” (eStream 2025), pp. 1-4, Apr. 2025.
[70] Tzung-Je Lee*, and Zheng-Hao Li, “A 8.533 Gbps I/O Buffer with Low Power PVT Compensation Using 16 nm FinFET Process,” 2025 IEEE International Conference on Consumer Electronics Taiwan (ICCE-TW 2025), pp. xx (Paper ID: 1571123756, Accepted) (Kaohsiung, Taiwan)
[71] Tzung-Je Lee*, and Keng-I Lin, “An On-Chip Inductive Digital Galvanic Isolator with 503 kV/μs CMTI Using GaN Process,” 2025 IEEE International Conference on Consumer Electronics Taiwan (ICCE-TW 2025), pp. xx (Paper ID: 1571123999, Accepted) (Kaohsiung, Taiwan)