E-mail: danilo.manstretta@unipv.it
Linked-in: Danilo Manstretta
Phone: +39 0382 985 943 (Office - F Floor)
Phone: +39 0382 985 227 (Lab - Edificio Segreterie - 2nd Floor)
Danilo Manstretta (M’03) received the Laurea degree (summa cum laude) and the Ph.D. degree in electrical engineering and computer science from the University of Pavia in 1998 and 2002, respectively.
From 2001 to 2003 he was with Agere Systems as a Member of Technical Staff, working on WLAN transceivers and linear power amplifiers for base stations. From 2003 to 2005 he was with Broadcom Corporation, Irvine, CA, working on RF tuners for TV applications. In 2005 he joined the University of Pavia, where he is now Associate Professor. His research interests are in the field of analog, RF, optical and millimeter-wave integrated circuit design.
Dr. Manstretta is the Technical Program Committee Chair of the 2023 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. He is TPC member of RFIC since 2006 and of ESSCIRC since 2022. He was Guest Editor of the IEEE Journal of Solid-State Circuits May 2017 Special Section dedicated to the 2016 RFIC Symposium and Guest Editor of the IEEE Transactions on Microwave Theory and Techniques June 2018 Mini Special Issue dedicated to the 2017 RFIC Symposium. He was co-recipient of the 2003 IEEE Journal of Solid-State Circuits Best Paper Award.
J. Jin, S. Lecchi, R. Castello and D. Manstretta, "An FDD Auxiliary Receiver with a Highly Linear Low Noise Amplifier," ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC), Milan, Italy, 2022, pp. 309-312. doi: 10.1109/ESSCIRC55480.2022.9911524
N. Cordioli, D. Manstretta and R. Castello, "A 58 GHz Bandwidth, and less than 1.8% THD, Mach-Zehnder Driver, in 28 nm CMOS Technology," ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC), Milan, Italy, 2022, pp. 429-432. doi: 10.1109/ESSCIRC55480.2022.9911473
I. Apostolina and D. Manstretta, "A 14.5-17.9 GHz Harmonically-Coupled Quad-Core P-N Class-B DCO with -117.3 dBc/Hz Phase Noise at 1 MHz Offset in 28-nm CMOS," 2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Denver, CO, USA, 2022, pp. 211-214. doi: 10.1109/RFIC54546.2022.9863180
N. N. Miral, K. Sohal, D. Manstretta and R. Castello, "Filtering Trans-Impedance Amplifiers: from mW of Power to GHz of Bandwidth," 2022 IEEE Custom Integrated Circuits Conference (CICC), Newport Beach, CA, USA, 2022, pp. 1-8. URL: doi: 10.1109/CICC53496.2022.9772822
J. Jin, J. Wu, R. Castello and D. Manstretta, "A 400-μW IoT Low-IF Voltage-Mode Receiver Front-End With Charge-Sharing Complex Filter," in IEEE Journal of Solid-State Circuits, vol. 57, no. 7, pp. 1957-1967, July 2022. doi: 10.1109/JSSC.2022.3161340
N. N. Miral, D. Manstretta and R. Castello, "A 17-mW 0.5–1.5-GHz Bandwidth TIA Based on an Inductor-Stabilized OTA With 35–42-dBm In-Band IIP3," in IEEE Solid-State Circuits Letters, vol. 5, pp. 13-16, 2022. doi: 10.1109/LSSC.2022.3149300
N. N. Miral, D. Manstretta and R. Castello, "A 17 mW 33 dBm IB-OIP3 0.5-1.5 GHz Bandwidth TIA Based on an Inductor-Stabilized OTA," ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC), Grenoble, France, 2021, pp. 203-206. doi: 10.1109/ESSCIRC53450.2021.9567850
A. Mohammadpour, D. Manstretta and R. Castello, "A 140μW Front-end with 5.7 dB NF and +10 dBm OOB-IIP3 using Voltage-Mode Boosting Mixer," in IEEE Microwave and Wireless Components Letters, doi: 10.1109/LMWC.2021.3066420.
J. Jin, J. Wu, R. Castello and D. Manstretta, "A 4.8dB NF, 440 μW Bluetooth Receiver Front-End with a Cascode Noise Cancelling LNTA," in IEEE Microwave and Wireless Components Letters, doi: 10.1109/LMWC.2021.3062901.
E. Kargaran, C. Bryant, D. Manstretta, J. Strange and R. Castello, "A Sub-0.6V, 330 µW, 0.15 mm2 Receiver Front-End for Bluetooth Low Energy (BLE) in 22 nm FD-SOI with Zero External Components," 2019 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2019, pp. 169-172, doi: 10.1109/A-SSCC47793.2019.9056899.
E. Kargaran, B. Guo, D. Manstretta and R. Castello, "A Sub-1-V, 350- $\mu$ W, 6.5-dB Integrated NF Low-IF Receiver Front-End for IoT in 28-nm CMOS," in IEEE Solid-State Circuits Letters, vol. 2, no. 4, pp. 29-32, April 2019, doi: 10.1109/LSSC.2019.2917870.
L. Aschei, N. Cordioli, P. Rossi, D. Montanari, R. Castello and D. Manstretta, "A 42-GHz TIA in 28-nm CMOS With Less Than 1.8% THD for Optical Coherent Receivers," in IEEE Solid-State Circuits Letters, vol. 3, pp. 238-241, 2020, doi: 10.1109/LSSC.2020.3012691.
K. Sohal, D. Manstretta and R. Castello, "A 2nd Order Current-Mode Filter with 14dB Variable Gain and 650MHz to 1GHz Tuning-Range in 28nm CMOS," 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021, pp. 1-5, doi: 10.1109/ISCAS51556.2021.9401498.
B. Guo, D. Prevedelli, R. Castello and D. Manstretta, "A 0.08mm2 1-6.2 GHz Receiver Front-End with Inverter-Based Shunt-Feedback Balun-LNA," 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2020, pp. 379-382, doi: 10.1109/RFIC49505.2020.9218307.
G. Pini, D. Manstretta and R. Castello, "Analysis and Design of a 260-MHz RF Bandwidth +22-dBm OOB-IIP3 Mixer-First Receiver With Third-Order Current-Mode Filtering TIA," in IEEE Journal of Solid-State Circuits, vol. 55, no. 7, pp. 1819-1829, July 2020, doi: 10.1109/JSSC.2020.2987715.
G. Pini, D. Manstretta and R. Castello, "A 260-MHz RF Bandwidth Mixer-First Receiver With Third-Order Current-Mode Filtering TIA," ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC), 2019, pp. 183-186, doi: 10.1109/ESSCIRC.2019.8902498.
M. D. Salehi, D. Manstretta and R. Castello, "A 150-MHz TIA with un-Conventional OTA Stabilization Technique via Local Active Feed-Back," 2019 15th Conference on Ph.D Research in Microelectronics and Electronics (PRIME), 2019, pp. 5-8, doi: 10.1109/PRIME.2019.8787777.