Mitko Bozinov

Course Outcomes

1. Efficiently model a complex digital system as a hierarchy of interconnected components, taking advantage of regularity and component re-use.
2. Apply VHDL entity/architecture modeling to represent component inputs and outputs and also internal signals, variables, and operations.
3. Develop VHDL models of systems using behavioral, structural, and dataflow concepts to describe the internal behavior and/or structure of the design.
4. Build VHDL models of complex digital circuits suitable for synthesis where the target platform is an FPGA or ASIC logic library, and understand the limitations of VHDL as a synthesis language and know which particular styles of VHDL coding lead to efficient solutions.
5. Use VHDL to design complex synthesizable state machines using Mealy and/or Moore architectures.
6. Write test vectors for a digital system and develop a VHDL test-bench to apply these vectors using file based input/output operations.
7. Represent and document designs, perform simulations, and synthesize implementations using software tools provided by an FPGA vendor.
8. Develop technical documentation of a complex digital system using hardware description language and schematic representations and to evaluate the correct function and performance based on simulations of the system.

FPGA Applications

• Aerospace & Defense
• ASIC Prototyping
• Audio
• Automotive
• Broadcast & Pro AV
• Consumer Electronics
• Data Center
• High Performance Computing and Data Storage
• Industrial
• Medical
• Security
• Video & Image Processing
• Wired Communications
• Wireless Communications