Assembly Language (For CTF)
MIPS
0x01 Processor Register
MIPS is a load-store architecture, which means that when we want to access memory, we must access it through load and store instructions. All other instructions (add, sub, mul, div, etc.) must get their operands from registers and store their results in registers. For example the following example:
sum = x + y
We assume that sum and x , y are variables in the program, and their MIPS assembly representation is:
# sum = x + y
lw $t0, x # Load x from memory into a CPU register
lw $t1, y # Load y from memory into a CPU register
add $t0, $t0, $t1 # Add x and y
sw $t0, sum # Store the result from the CPU register to memory