I served as Program Chair for ISMM 2020 and as co-organizer of the ML for Systems Workshop at NeurIPS 2020 and 2021. I co-founded the Practical Adoption Challenges of ML for Systems in Industry (PACMI) Workshop at MLSys.
I have also served on various PCs and ERCs:
PC: ISCA 2022, MLSys 2022, EuroSys 2022, ISCA 2021, ICML 2021, NeurIPS 2021, HPCA 2021 (industry track), ICPP 2020, NeurIPS 2020, PLDI 2019
ERC: ISCA 2020, ASPLOS 2019, 2020 and 2021, PLDI 2018
Others: AEC for CGO 2015 and PPoPP 2015, PC for TinyToCS Vol. IV.
I have been involved with the RISC-V project since joining the Berkeley Architecture Group in 2011. I stay involved in the RISC-V community, serve as a member of the Technical Committee and am serving as the chair of the J Extension Working Group, which investigates extensions for JITed and interpreted languages in RISC-V. I am also a member of the Software Working Group and maintain the RISC-V Yocto port.