MIPS Soft IP core on Artix-7 FPGA
Built a MIPS soft CPU and a static memory map with a custom linker script (EEPROM for .text, RAM for .vga_buffer + .data + stack). Wrote a minimal bootloader (ROM->RAM init; no libc) and a MIPS Snake game with an 8 KB VGA framebuffer, edge-safe spawns, timed apples, and hazards. Compiled a previous project (MIPS Snake Game) with the custom script, exported the instruction image, and loaded it into a Vivado testbench to exercise the core end-to-end before board bring-up.
Note: the diagram on the right shows the standard single-cycle datapath; my implementation adds extra control signals and external buses/lines that aren't shown.
AER (Aztec Electric Racing) - Embedded Firmware
Built safety-oriented, event-driven firmware that sequences HV relays through a precharge/contactor state machine and triggers an immediate shutdown/reset on SDC interrupt. Implemented CAN 2.0 telemetry at 1 Mbps over SN65HVD230, packing system state + relay/input bitfields + heartbeat into a compact status frame (StdID 0x200, DLC=4) with reserved fields/frames for future faults/expansion. Added bring-up diagnostics by reporting CAN errors and bus health (TEC/REC, bus-off, last-error-code).
STM32F767ZI: Ethernet + LwIP Bring-Up (Wireshark)
Brought up Ethernet on an STM32F767ZI using LwIP (static IP) and debugged end-to-end connectivity at the packet level. Used Wireshark to confirm the MCU was transmitting Ethernet/IP traffic, then fixed the host network configuration (subnet/gateway) so packets reliably reached the board.
Basys3 (Artix-7): FPGA Labs, Vivado (Verilog)
A register-transfer-level (RTL) lab series on the Basys 3 (Artix-7). I drove a seven-segment display with pure combinational logic, built a hex F->0 down counter with wrap and reset, and implemented a full UART Tx/Rx echo (8N1) using a baud-rate generator derived from the board clock. Along the way I worked with clock dividers, clean reset behavior, debouncing, and .xdc pin constraints for reliable hardware bring-up. These exercises strengthened my fundamentals in FSMs, timing, and I/O integration.
ATmega328PB Microcontroller Labs
A hands-on series with the ATmega328PB, focused on register-level programming rather than libraries. I configured GPIO to drive and read pins, built timer/PWM routines for LED brightness and audio, handled interrupts for responsive control, and implemented UART for serial communication. Along the way I practiced debouncing and state-machine patterns to make inputs reliable. These labs built the foundation I use now for firmware bring-up and peripheral initialization.