Undergraduate student, Dept. of Electronics, Faculty of Engineering, Kyoto University (Apr. 1987 - Mar. 1991)
Graduate student, Dept. of Electronics, Graduate School of Engineering, Kyoto University (Apr.1991 - Mar. 1993)
Assistant professor, Dept. of Electronics, Graduate School of Engineering, Kyoto University (Apr.1993 - Mar. 2001)
Associate professor, Dept. of Communication and Computer Engineering, Graduate School of Informatics, Kyoto University (Apr. 2001- Mar. 2002, Apr 2004 - Mar 2009)
Associate professor, VLSI Design and Education Center, University of Tokyo (Apr. 2002 - Mar. 2004)
Professor, Dept. of Electronics, Graduate School of Science and Technology, Kyoto Institute of Technology (Apr. 2009 - Current)
ST (Perl Package for Simulation and Test)
Quantam Computers
VLSI design and evaluation
Soft Errors
Rad-Hard FFs for bulk, FinFET and SOI
SET measurement circuit
SER estimation method by using PHITS and TCAD
Aging degradation, BTI (Bias Temperature Instability)
RTN (Random Telegraph Noise)
Power electronics
Gate Drivers operating at MHz for power devices
GaN IC
Ringing suppression strategy
Variation-aware Reconfiguration
Enhance Speed and Yield by using random and systematic process variations.
I presented the concept above for the first time in the world.
Low-power design
Resource-shared VLIW processor
Configurable Processor Implemented by System-C
Functional Memory-type Parallel Processor, FMPP
SIMD processing on memory based on the CAM (content addressable memory) structure
From KIT (after Apr. 2009)
From Kyoto University (before Mar. 2009)