Biography

Work Experience

Staff Application Engineer, 3DIC Compiler (2024.02 - )

• Synopsys, Mountain View, CA, USA

Senior II Application Engineer, 3DIC Compiler (2022.03 - 2024.01)

• • Synopsys, Mountain View, CA, USA

Education and Research Experience

Research Affiliate (2021.03 - 2022.02)

• • School of Electrical and Computer Engineering (ECE), GIT, GA, USA

Research Assistant Professor (2019.04 - 2022.02)

• • Electrical Engineering (EE), POSTECH, Korea

Postdoctoral Researcher (2018.03 - 2019.03)

• • POSTECH Information Research Laboratories (PIRL), POSTECH, Korea

Postdoctoral Researcher (2016.03 - 2018.02)

• • Creative IT Engineering and Future IT Innovation Laboratory, POSTECH, Korea

Doctor of Philosophy (2012.09 - 2016.02) 

• • Creative IT Engineering, POSTECH, Korea (GPA 4.21/4.3)

  • Dissertation: A Study on Simulation and Characterization of Advanced Si Nano-devices and Applications

Bachelor of Science (2009.03 - 2012.08)

• • Electrical Engineering, POSTECH, Korea (Summa Cum Laude, GPA 4.09/4.3)

Professional Experience

Research Assistant

• • TCAD, Semiconductor characterization systems (2012.09 - 2022.02)

Professional Services 

• • Invited Lecture in Gyeongsang National University (April 2024)

  • Session chair in international conferences (AWAD 2016, 2017)

  • Reviewer of IEEE, Elsevier, AIP, ACS, and IET Journals

  • IEEE Trans. Electron Dev., Trans. on Nano., Electron Dev. Lett., Sensors Lett., J. Electron Dev. Soc., Micromachine, ACS Applied Electronic Materials

  • Solid-State Electronics, AIP Advances, Micro and Nano Letters, Electronics Letters, IET Circuits, Devices, and Systems

Awards

• • Achievement Award, 3DIC Compiler, Signoff & Silicon Innovations Group (2023)

  • BK21 Four Scholarship (2020.12 – 2022.02)

  • EDISON Challenge – Nanophysics: Prize (2019.01) 

  • EDISON Challenge – Nanophysics: Minister prize (Ministry of Science, ICT, and Future Planning) (2017.03) 

  • Research Fellow, POSTECH (2016.09 – 2019.09)

  • Summa Cum Laude (2016.02) 

Research Projects

• Samsung Semiconductor R&D (2021.11 - 2022.02: 0.3 years): Backside Power Delivery Network for 2D and 3D ICs

• National Research Foundation of Korea (NRF) (2020.07 - 2022.02: 1.7 years): Unified Memory AI Platform to Solve Extremely Challenging Issues on 3D-NAND Flash Industry

• SK Hynix (2020.03 - 2022.02: 2 years): Process and performance optimization of DRAM peripheral devices using AI technique

• SK Hynix (2019.11 - 2022.02: 2.3 years): In-depth Analysis of Abnormal Program Cell (APC) in 3D NAND Flash Memory 

• Samsung Electronics (2018.09 - 2022.02: 3.5 years): RC Optimization of Sub-5-nm Node Gate-all-around Nanosheet FETs 

• Ministry of Science, ICT and Future Planning (2018.01 - 2021.12 : 4 years): 5 nm Technology Node 3DIC Configuration and Device Performance Estimation 

• National Research Foundation of Korea (NRF) (2018.03 - 2020.02 : 2 years): Multi-gate MOSFET Design for Sub-7-nm Node 

• Samsung Electronics (2017.05 - 2018.04 : 1 year): 10-nm node Next Generation Silicon Nanowire Thyristor RAM 

• LG Innotek (2017.01 - 2017.12 : 1 year): GaN Avalanche Photodetector 

• Future IT I-Lab. (2015.01 - 2016.12 : 2 years): Development of Silicon Nanowire Infrared Photodetector

• SEMATECH (2014.01 - 2015.06 : 1.5 years): Technology Evaluation and Si Multi-gate FETs using Electrical Characterization and Calibrated TCAD Simulation 

• SK Hynix (2013.06 - 2015.05 : 2 years): DC Characteristics and Reliability of 3D NAND Flash Memory