Junsik Yoon
Junsik Yoon
Synopsys: 3DIC Compiler, Fusion Compiler, IC Compiler2, H-SPICE, Raphael, Custom compiler, IC Validator, StarRC, Siliconsmart, Design Compiler, PrimeTime, TCAD Sentaurus
Cadence: Virtuoso, Abstract generator, Liberate, Quantus QRC Techgen, Innovus
Ansys: Redhawk-sc, Redhawk-sc et
Device modeling: MIT virtual source model, BSIM CMG, RF Y-parameter
Device characterization: 1/f noise, variability
Programming languages: Python, Matlab, Tcl
Semiconductor equipment systems: 4200-SCS, 4284A LCR Meter, 89410A Vector Signal Analyzer
Address: 800 N. Mary Ave, Sunnyvale, CA 94085
E-mail: junsik at synopsys.com, junsikyoon at gmail.com
LinkedIn: https://www.linkedin.com/in/junsik-yoon-94167466/
Researchgate: https://www.researchgate.net/profile/Jun_Sik_Yoon