Hello! I am a Ph.D. student in the School of Electronic and Electrical Engineering at Kyungpook National University (KNU), in AI-Embedded System-Software-on-Chip Platform (AI-S2oC) Lab.
I am the first student enrolled in a B.S./M.S./Ph.D.-integrated course at KNU.
My research focuses on realizing AI at the edge, specifically addressing the challenge of executing neural network computations encompassing training and inference on MCUs. Applying general-purpose neural networks as is to resource-constrained MCU-based edge environments is not feasible. Particularly in tightly coupled MCU architectures where hardware and software must be considered together, a design that accounts for both is necessary. Therefore, I have conducted full-stack research aimed at improving the software for AI applications optimized for target MCU architectures and designing hardware architectures capable of efficiently executing this software. Consequently, my research interest encompasses both software for MCUs (firmware) and hardware processor design.
Kyungpook National University, Daegu, Korea [Sep. 2019 ~ Present]
Integrated B.S./M.S./Ph.D. student in School of Electronic and Electrical Engineering
Advised by Prof. Daejin Park.
Kyungpook National University, Daegu, Korea [Mar. 2014 ~ Aug. 2019]
B.S. in School of Electronics Engineering (Early graduated)
Ph.D. Research Fellowship, National Research Foundation of Korea (NRF) [Sep. 2023 ~ Aug. 2024]
IoT Processor HW/SW Embedded Weight Parameter Intelligence and On-Chip Software Platform for Lightweight Edge AI Computation ($20K / year)
Jisu Kwon, and Daejin Park. "Efficient Partial Weight Update Techniques for Lightweight On-Device Learning on Tiny Flash-Embedded MCUs", in IEEE Embedded Systems Letters, vol. 15, no. 4, pp. 206-209, Dec. 2023. (SCIE) [Paper]
Jisu Kwon, and Daejin Park, "Efficient Sensor Processing Technique Using Kalman Filter-Based Velocity Prediction in Large-Scale Vehicle IoT Application", in IEEE Access, vol. 10, pp. 116735-116746, Oct. 2022. (SCIE) [Paper]
Jisu Kwon, Sejong Oh, and Daejin Park, "Metamorphic Edge Processor Simulation Framework Using Flexible Runtime Partial Replacement of Software-Embedded Verilog RTL Models", in IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, South Korea, May. 2021. [Paper]
Jisu Kwon, Moon Gi Seok, and Daejin Park, "User sensible Sliding Firmware Update Technique for Flash-Area/Time Cost Reduction toward Low-Power Embedded Software Replacement", in IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOLChips 23), Kokubunji, Japan, Apr. 2020. [Paper]
Last updated: Nov. 2024