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The purpose of this course is to develop techniques for analyzing and designing digital integrated circuits. For circuit implementations 0.25 micron CMOS technology is being used. The course will start with a brief review of the state-of-the-art technology, followed by fundamental device models. Next, a detailed description and analysis of the core digital design block, being the inverter, will be given. It will be followed by the design of more complex logic gates, such as NAND, NOR, and XOR, looking at optimizing the speed, area, or power. The learned techniques will be applied on designing MSI level building blocks. Substantial attention will be devoted to the discussion of sequential circuits, clocking approaches, and memories. The course will be concluded with the discussion of the impact of interconnect parasitics on the design performance and approaches to cope with them. Significant emphasis will be placed on the use of CAD Tools (Mentor Graphics Electronic Design Automation tools) for labs, homework assignments, and projects.
The purpose of this course is to develop techniques for analyzing and designing digital integrated circuits. For circuit implementations 0.25 micron CMOS technology is being used. The course will start with a brief review of the state-of-the-art technology, followed by fundamental device models. Next, a detailed description and analysis of the core digital design block, being the inverter, will be given. It will be followed by the design of more complex logic gates, such as NAND, NOR, and XOR, looking at optimizing the speed, area, or power. The learned techniques will be applied on designing MSI level building blocks. Substantial attention will be devoted to the discussion of sequential circuits, clocking approaches, and memories. The course will be concluded with the discussion of the impact of interconnect parasitics on the design performance and approaches to cope with them. Significant emphasis will be placed on the use of CAD Tools (Mentor Graphics Electronic Design Automation tools) for labs, homework assignments, and projects.
The objective of this class is to develop systematic techniques for large-scale digital logic design and analysis. We will primarily be concerned with the design of multi-input, multi-output system controllers, which provide the central control signals that orchestrate the collection of hardware devices found in a digital system. This being the case, much of the work in this course will center upon the synchronous state machine design of system controllers using Field Programmable Gate Arrays (FPGAs). In addition, the design of asynchronous sequential machines and the transient behavior of logic circuits will be examined. The labs and the two design projects will be based upon the Nexys A7 FPGA Training Board (Xilinx Artix-7 FPGA). Lab assignments will be carried out using the students’ own FPGA Development Boards. Students will be designing, simulating and implementing their circuits using VHDL and professional CAD tools by Xilinx. Licensed Xilinx tools are available on PC workstations located in the Microcomputer Lab (Room B-210).
The objective of this class is to develop systematic techniques for large-scale digital logic design and analysis. We will primarily be concerned with the design of multi-input, multi-output system controllers, which provide the central control signals that orchestrate the collection of hardware devices found in a digital system. This being the case, much of the work in this course will center upon the synchronous state machine design of system controllers using Field Programmable Gate Arrays (FPGAs). In addition, the design of asynchronous sequential machines and the transient behavior of logic circuits will be examined. The labs and the two design projects will be based upon the Nexys A7 FPGA Training Board (Xilinx Artix-7 FPGA). Lab assignments will be carried out using the students’ own FPGA Development Boards. Students will be designing, simulating and implementing their circuits using VHDL and professional CAD tools by Xilinx. Licensed Xilinx tools are available on PC workstations located in the Microcomputer Lab (Room B-210).
The primary emphasis of the course will be microcontroller architecture, firmware and embedded software design but hardware interface design issues will also be extensively covered. Students are expected to show expertise in both areas. Currently, the ARM Cortex STM32F429I microcontroller is being used (STM32F429I-DISC1 Evaluation Board) as the hardware platform . Software development is done by using STM32CubeMX configuration tool and the EWARM compiler and debugger by IAR. Application programs are developed in C. Interface designs include Input Capture and Output Compare, the CAN Bus, the I2C Bus, the SPI Bus, analog I/O and SRAM chip interfacing to the extended bus. Programs are downloaded into the Flash Memory of the microcontroller.
The objective of this course is to discuss various aspects of memory systems design, interfacing to multi-processor bus systems and hardware/software co-design. Students are expected to have a background in digital logic design and in microprocessor/microcontroller systems design. Though some software topics will also be covered, the primary emphasis will be on hardware design of complex digital systems. The four design projects will be based upon VHDL and C programming and System-on-Chip (SoC) devices. The hardware platform is the Zybo Z7 (Zynq 7020) Board by Digilentinc. Students will be designing the Programmable Logic (PL) segment of their systems in VHDL using currently available Xilinx Vivado CAD tools. They will also be developing C programs for the ARM Cortex A9 processor-based Processing System (PS) segment of their SoC devices by using the Xilinx Vitis tool which is also available on PCs located in the Microcomputer Lab (Room B-210). Students are required to download the free Xilinx Vivado and Vitis tools to work on their projects outside of the Microcomputer Lab.
The objective of this course is to discuss various aspects of memory systems design, interfacing to multi-processor bus systems and hardware/software co-design. Students are expected to have a background in digital logic design and in microprocessor/microcontroller systems design. Though some software topics will also be covered, the primary emphasis will be on hardware design of complex digital systems. The four design projects will be based upon VHDL and C programming and System-on-Chip (SoC) devices. The hardware platform is the Zybo Z7 (Zynq 7020) Board by Digilentinc. Students will be designing the Programmable Logic (PL) segment of their systems in VHDL using currently available Xilinx Vivado CAD tools. They will also be developing C programs for the ARM Cortex A9 processor-based Processing System (PS) segment of their SoC devices by using the Xilinx Vitis tool which is also available on PCs located in the Microcomputer Lab (Room B-210). Students are required to download the free Xilinx Vivado and Vitis tools to work on their projects outside of the Microcomputer Lab.
Among the various paradigmatic changes in science and mathematics, one such change concerns the concept of uncertainty. The driving force behind this paradigm shift is the realization that traditional two-valued logical decision systems, crisp set theory and crisp probability theory are inadequate for dealing with imprecision, uncertainty and complexity of the real world. It is this realization that motivates the evolution of fuzzy set theory and fuzzy logic. One of the most successful fields of application of fuzzy set theory has been in control systems. This course is designed to address the theoretical aspects of fuzzy set theory and fuzzy logic, fuzzy control, the implementation issues of fuzzy controllers, application of fuzzy logic in supervisory control, design of fuzzy logic hardware accelerators, and applications of fuzzy automata in intelligent decision support systems.
Among the various paradigmatic changes in science and mathematics, one such change concerns the concept of uncertainty. The driving force behind this paradigm shift is the realization that traditional two-valued logical decision systems, crisp set theory and crisp probability theory are inadequate for dealing with imprecision, uncertainty and complexity of the real world. It is this realization that motivates the evolution of fuzzy set theory and fuzzy logic. One of the most successful fields of application of fuzzy set theory has been in control systems. This course is designed to address the theoretical aspects of fuzzy set theory and fuzzy logic, fuzzy control, the implementation issues of fuzzy controllers, application of fuzzy logic in supervisory control, design of fuzzy logic hardware accelerators, and applications of fuzzy automata in intelligent decision support systems.
The objective of this course is to develop skills for designing complex digital systems and system-on-chip (SoC) applications. In addition, topics in the following areas are also discussed: reconfigurable devices and systems, reconfigurable computing applications, dynamic reconfigurations and its applications and hardware/software codesign. Students are expected to have a background in digital logic design. The three design projects will be based upon Field Programmable Gate Arrays (FPGAs). Students will be designing their circuits in VHDL using professional CAD tools by Xilinx.
The objective of this course is to develop skills for designing complex digital systems and system-on-chip (SoC) applications. In addition, topics in the following areas are also discussed: reconfigurable devices and systems, reconfigurable computing applications, dynamic reconfigurations and its applications and hardware/software codesign. Students are expected to have a background in digital logic design. The three design projects will be based upon Field Programmable Gate Arrays (FPGAs). Students will be designing their circuits in VHDL using professional CAD tools by Xilinx.
The main objective of this course is to develop skills for designing custom digital circuits using VHDL and Programmable Logic Devices (PLDs). The basic properties of CMOS logic circuits and the key features of semi-custom and full-custom ASIC devices will be reviewed. Methods for floor planning, placement and routing are also discussed. Students are expected to have a background in digital logic design. The two design projects will be based upon Field Programmable Gate Arrays (FPGAs). Students will be designing their circuits in VHDL using professional CAD tools by Xilinx.
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