Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture. This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems. The promise of the technology is to create a brain-like ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities [1]. This project aims to implement neuromorphic hardware using analog, digital, and mixed-signal VLSI, based on standard CMOS technology and emerging devices. ([1] Catherine D. Schuman et al, "A Survey of Neuromorphic Computing and Neural Networks in Hardware") [Related Paper JETCAS'19 TVLSI'19 IOTJ'21 TC'21 JLPEA'22 TED'22 JETCAS'22 JETCAS'23]. 

Since the first IC was developed in 1958 by Jack Kilby (awarded the Nobel Prize in 2000), two-dimensional integrated circuits (2D IC) have been serving many modern custom electronics. However, facing information ballooning and exploding in the big-data age, three-dimensional integrated circuits (3D IC) are emerging as a promising way to overcome scaling problems of 2D IC. Through silicon via (TSV) is the enabling technology in 3D IC for fine-grained vertical connection of multiple dies into a single 3D stack. The TSVs provide the space for timing and thermal optimization and in turn save fabrication cost, improve performance, and increase power efficiency. [Related Paper MEE'16 MEE'18 TVLSI'18]. 

Critical civil infrastructure, such as wind turbines, railways, bridges and pipelines, is a key lifeline as networks for economy and society need. An innovative technology using the wireless passive networks with UAS is proposed through integrating data collection, data storage and processing, damage identification, and risk assessment for developing intelligent critical civil infrastructures. RF powered wireless sensor networks are distributed to predetermined locations, while the UAS will be utilized and through custom integrated circuit chip design to optimize on-board processing and storage for data in-situ transmission. With such, in-situ performance data will be available for timely assessing and managing these intelligent critical infrastructures. [Related Paper IOTJ'21 TC'21]

Microchips form the essential core of many cutting-edge devices such as smartphones, tablets, flat-screen monitors, television sets, sophisticated cars, aircraft, and many medical sensors. However, as microchip technology enters nano-meter regime, extra-high integration exacerbates thermal problem, which has threatened its performance, reliability, and service life. Even a small increase in microchip temperature (of the order of 10-15 degree) can result in a factor of 2x increase in the device damage. It is reported that over 90% of microchips’ damage is directly or indirectly associated with overheating. This project aims to develop a novel low-cost self-cooling technology to actively and passively control thermal transport in microchips.