FPGA for HPC Workshop 2021

Abstract

At RIKEN Center for Computational Science (R-CCS), we have been developing "ESSPER (Elastic and Scalable System for high-PErformance Reconfigurable computing)," which is a prototype FPGA cluster system targeting reconfigurable HPC. The system is composed of sixteen Intel Stratix 10 SX FPGAs which are connected by a dedicated 100Gbps inter-FPGA network. The host servers of the FPGAs are connected with a 100Gbps Infiniband switch, which allows distant servers to remotely access FPGAs on different host servers using a software bridged Intel's OPAE FPGA driver, called R-OPAE. ESSPER was actually connected to the world's fastest supercomputer Fugaku in RIKEN, with sixteen 100m optical cables. In tasks running on Fugaku nodes, we can program bitstreams onto FPGAs remotely using R-OPAE, and off-load tasks to the FPGAs with application cores embedded in the FPGA shell. In this talk, I introduce our achievements, challenges, and future prospects of reconfigurable HPC with FPGAs, especially, in a system point of view.

Speaker's Bio

Kentaro Sano is the team leader of the processor research team at RIKEN Center for Computational Science (R-CCS) since 2017, responsible for research and development of future high-performance processors and systems. He is also a visiting professor with an advanced computing system laboratory at Tohoku University. He received his Ph.D. from the graduate school of information sciences, Tohoku University, in 2000. Since 2000 until 2018, he had been a Research Associate and an Associate Professor at Tohoku University. He was a visiting researcher at the Department of Computing, Imperial College, London, and Maxeler Technology corporation in 2006 and 2007. His research interests include data-driven and spatial-parallel processor architectures such as a coarse-grain reconfigurable array (CGRA), FPGA-based high-performance reconfigurable computing, high-level synthesis compilers and tools for reconfigurable custom computing machines, and system architectures for next-generation supercomputing based on the data-flow computing model.

Contact

If you have questions about this workshop, you can directly leave them on the workshop channel named "workshop-hpcfpga" in the IEEE Cluster2021's official slack workspace (you need to register for IEEE Cluster2021 first). If you cannot see the channel, please just "+Add channel" and find "workshop-hpcfpga" there.

Also, the mailing list for this workshop hpc-fpga-ws2021@hpcs.cs.tsukuba.ac.jp is available.