FPGA for HPC Workshop 2021

held in conjunction with IEEE Cluster 2021

Thank you for joining us!!

This workshop is successfully finished.
The presentation slides are available here.

Registration

All attendees must register at the IEEE Cluster website.

Important Notice:
Participation in the workshop is a part of IEEE Cluster 2021. That is, if you register for IEEE Cluster 2021, you can attend not only to this workshop but also to "all sessions including all workshops", so please consider attending if you are interested in anything about the conference content.

Conference Operation

IEEE Cluster 2021 and its workshops will no longer take place in Portland, Oregon, USA and will instead be operated virtually.

Date：Tuesday, September 7th, 2021

Objective of Workshop

The cluster computing for High Performance Computing (HPC) has been improved both its performance and data handling capabilities mainly thanks to the increase of operation frequency, number of cores per chip and degree of parallelism per instruction. Facing to the limit of power consumption, however, recent world top-class clusters are equipped with Graphics Processing Unit (GPU) to enhance their performance/power efficiency for many applications suitable with this accelerating architecture. On the other hand, Field Programmable Gate Array (FPGA) has been attractive to compensate several performance difficulties in GPU-only acceleration such as (partial) lack of parallelism in the application, its passive operation under CPU control, not ready for direct communication by itself, etc. We focus on recent great advantage of high-end FPGAs to cover these problems by GPU-only solution as the new technology for next generation of accelerated computing.

FPGA for HPC 2021 Workshop targets the FPGA technologies for mainly (but not limited) High Performance Computing to support computation power, high bandwidth memory usage, optimized FPGA design, programming technique, high speed communication link utilization, etc. The workshop is constructed with contributed technical paper presentation, keynote and invited talks and short panel discussion. The organizers like to provide this workshop as a cross field for exchanging valuable knowledge and technology to be shared by researchers on advanced FPGA technology and applications.

Important Dates

All deadlines are Anywhere on Earth (AoE)

FOR FULL PAPER

  • Paper submission deadline: June 25th → July 2nd (extended)

  • Acceptance notification: July 19th

  • Final camera ready deadline: July 30th

FOR SHORT PAPER

  • Paper submission deadline: July 16th

  • Acceptance notification: July 23rd

  • Final camera ready deadline: July 30th

Workshop Coverage Area

The workshop covers the following, but not limited, FPGA related research on system and application for High Performance Computing and other useful applications.

  • FPGA-ready cluster system hardware and software, including FPGA itself, supporting system on host CPU, etc.

  • FPGA programming model and supporting system

  • FPGA applications including HPC, AI, data science, etc.

  • FPGA optical link communication system

  • Parallel FPGA programming system

  • Peripheral controlling by/with FPGA including network, storage, etc.

  • Multi-hybrid system with FPGA and other accelerators

Proceedings

All accepted papers are published in the workshop volume of IEEE Cluster 2021.

Paper Submission

All contributed papers should be submitted through EasyChair titled “HPC-FPGA-Cluster2021”.

Please follow the instructions below.

  • Submissions must be in PDF format and must conform to the following IEEE Xplore layout, page limit, and font size.

  • Submissions are required to be no more than 8 pages for full papers and 4 pages for short papers INCLUDING text, figure, table and reference list.

  • Submissions must be single-spaced, 2-column numbered pages in IEEE Xplore format (8.5x11-inch paper, margins in inches – top: 0.75, bottom: 1.0, sides:0.625, and between columns:0.25, main text: 10pt).

  • Papers will be reviewed SINGLE-BLIND. Author names and affiliations should be included in the submitted paper, and appropriate citations of prior work must be included.

  • LaTeX and Word Templates are available here.

  • Only web-based submissions are allowed.

The submission web page URL is here.

Contact

If you have questions about this workshop, you can directly leave them on the workshop channel named "workshop-hpcfpga" in the IEEE Cluster2021's official slack workspace (you need to register for IEEE Cluster2021 first). If you cannot see the channel, please just "+Add channel" and find "workshop-hpcfpga" there.

Also, the mailing list for this workshop hpc-fpga-ws2021@hpcs.cs.tsukuba.ac.jp is available.