I am a Ph.D. student advised by Dr. Satyadev Ahlawat and Prof. Virendra Singh at Indian Institute of Technology Jammu, India. I completed my bachelor's from Government Engineering College Bikaner, India. I'm interested in the VLSI Testing, Design for Test (DfT), SoC Testing, Hardware Security and Secure High-Performance Processor Design.
Doctor of Philosophy
Advisors: Dr. Satyadev Ahlawat and Prof. Virendra Singh
Institute: Indian Institute of Technology Jammu, India
Timeline: August 2020 - Present
Bachelor of Engineering in Computer Science
BTP Advisor: Mr. Raj Kumar Choudhary
Institute: Government Engineering College Bikaner
Timeline: August 2016 - July 2020
Summer Intern, Department of Electrical Engineering, Indian Institute of Technology Bombay
Exploring the sniper simulator for processor architecture
Achievements:
Branch Predictor and Load Value Predictor is implemented in sniper simulator.
2-bit Confidence Counter is used to take decisions in predictors.
Timeline: May 2019 - July 2019
Summer Intern, Department of Electrical Engineering, Indian Institute of Technology Bombay
Computer architecture and VHDL
Achievements:
16-bit Multicycle Processor and Pipeline Processor is implemented in VHDL.
Data Forwarding logic is also implemented in Pipeline Processor to optimize it.
Timeline: May 2018 - July 2018
Received Student Travel Grant by ACM SIGBED and IEEE CEDA for attending Embedded System Week (ESWEEK) 2025 held at Taipei, Taiwan
Received ACM SIGDA and IEEE CEDA travel grant to attend 61st ACM/IEEE Design Automation Conference 2024 held at San Francisco, USA
PhD thesis extended abstract has been accepted to 61st ACM/IEEE Design Automation Conference 2024 DAC'24 PhD Forum
Received DAC2024 young fellowship by 61st Design Automation Conference (DAC) 2024
Received Travel Support for attending ISPEC Conference 2024
Received Student Travel Grant by IEEE CEDA for attending Embedded System Week (ESWEEK) 2023 held at Hamburg, Germany
Received Prime Minister Research Fellowship (August 2022)
Received Student Travel Grant for attending Asian Test Symposium (ATS) 2022 held at Taichung, Taiwan
Received ITC India 2022 Fellowship by International Test Conference (ITC) 2022
Received VLSID 2021 Fellowship by International Conference on VLSI Design 2021
Received DAC2021 young fellowship by 58th Design Automation Conference (DAC) 2021
Gate 2020 Qualified with 655 score