About ICEHA

Since 2012, Prof. Fabián Olivera researches at the laboratory of the Processing of Analog and Digital Signals (PADS) at the UFRJ, where received the MSc (2013) and PhD (2017) degrees in electronic/microelectronic engineering, under the advising of Prof. Antonio Petraglia. Integrated circuit (IC) designs for ultra-low-power applications have been the major researches in collaboration with professor Petraglia. In the last years, a collaboration research group between the laboratories of CEFET/RJ - Nova Friburgo (Prof. Fabián) and PADS/UFRJ (Prof. Petraglia) has been established by advising undergraduate, M.Sc. and D.Sc. degree students in cooperation, publishing the resulting research in the best journals (TCAS, IET, MJ) and in well-known international conferences.

Current Research

• Igor Meirelles Martins - Undergraduate Student 2020 (CEFET/RJ)

Genetic Algorithm for low-power LDO regulator automatic design

• Humberto Matheus Costa Abádio - Undergraduate Student 2020 (CEFET/RJ)

Study of Charge Pumps Circuits for Energy Harvesting Applications

• Lucas Souza da Silva - Undergraduate Student 2020 (CEFET/RJ)

Femto-Watt CMOS Voltage Reference Circuits

• Maria Antônia Oliveira Rodrigues - M.Sc. Student 2020 (UFRJ)

Analysis and Design of CMOS Sense Amplifiers

• Italo Bruni Oliveira Rodrigues - Ph.D. Student 2020 (UFRJ)

Integrated Circuits for Wide-Temperature-Range Energy Harvesting

• Odair Xavier - Ph.D. Student 2019 (UFRJ)

Maximum Power Transfer in Energy Harvesting Using Thermometric Generators

Undergraduate Student Publications

• Carlos A. Pinheiro Jr. (CEFET/RJ), Fabian Olivera (CEFET/RJ) and Antonio Petraglia (UFRJ).

Conference: 2021 IEEE 12th Latin American Symposium on Circuits & Systems (LASCAS), Arequipa, Peru.

Title: A Three-Stage Charge Pump with Forward Body Biasing in 28 nm UTBB FD-SOI CMOS

• Igor Meirelles Martins (CEFET/RJ), Fabian Olivera (CEFET/RJ) and Antonio Petraglia (UFRJ).

Conference: 27th IBERCHIP Workshop, Arequipa, Peru.

Title: A Computer-Aided Approach for Low-Power LDO Regulator Design

• Marcella C G De Moraes (CEFET/RJ), Pedro Henrique Leite (UFRJ), Fabian Olivera (CEFET/RJ) and Antonio Petraglia (UFRJ).

Conference: Microelectronics Students Forum (SFORUM) 2019, São Paulo, Brazil

Title: Analysis of Intrinsic Noise for 3T CMOS Voltage References

• Carlos A. Pinheiro Jr. (CEFET/RJ), , Fabian Olivera (CEFET/RJ) and Antonio Petraglia (UFRJ).

Conference: Microelectronics Students Forum (SFORUM) 2019, São Paulo, Brazil

Title: Study of Low-Power Circuits for Thermoelectric Harvesting in 28 nm FD-SOI CMOS Technology

Journal Publications

• IEEE Transactions on Circuits and Systems II: Express Briefs, December 2020:

A 120 mV Supply, Triode-Regulated Femto-Watt CMOS Voltage Reference Design

• Electronics Letters, Volume 56, Issue 22, October 2020:

Gate leakage compensation technique for self-cascode based voltage references

• IEEE Transactions on Circuits and Systems II: Express Briefs, Volume 67, Issue 10, October 2020:

Adjustable Output CMOS Voltage Reference Design

• IEEE Transactions on Circuits and Systems II: Express Briefs, Volume 67, Issue 4, April 2020:

Closed-Form Analysis of Metastability Voltage in 28 nm UTBB FD-SOI CMOS Technology

• Microelectronics Journal, Volume 78, August 2018:

Static noise margin trade-offs for 6T-SRAM cell sizing in 28 nm UTBB FD-SOI CMOS technology

• Analog Integrated Circuits and Signal Processing, Volume 89, Issue 3, March 2016:

A Computer-Aided Approach for Voltage Reference Circuit Design

International Conference Presentations

• 2021 IEEE 12th Latin American Symposium on Circuits & Systems (LASCAS), Arequipa, Peru. BY Fabián Olivera

A 120 mV Supply, Triode-Regulated Femto-Watt CMOS Voltage Reference Design (TCAS-II Invited paper)

• 2021 IEEE 12th Latin American Symposium on Circuits & Systems (LASCAS), Arequipa, Peru. BY Carlos A. Pinheiro Jr.

A Three-Stage Charge Pump with Forward Body Biasing in 28 nm UTBB FD-SOI CMOS

• 27th IBERCHIP Workshop, Arequipa, Peru. BY Igor Meirelles Martins

A Computer-Aided Approach for Low-Power LDO Regulator Design

• IEEE International Symposium on Circuits & Systems (2020) (CAS Transactions Papers) BY Fabián Olivera

Adjustable Output CMOS Voltage Reference Design

• IEEE International Symposium on Circuits & Systems (2020) (CAS Transactions Papers) BY Fabián Olivera

Closed-Form Analysis of Metastability Voltage in 28 nm UTBB FD-SOI CMOS Technology

• IEEE International Symposium on Circuits & Systems (2017) BY Fabián Olivera

Analytic Modeling of Static Noise Margin Considering DIBL and Body Bias Effects

• 29th Symposium on Integrated Circuits and Systems Design (2016) BY Fabián Olivera

Analytic boundaries for 6T-SRAM design in standby mode

• IEEE 6th Latin American Symposium on Circuits & Systems (2015) BY Fabián Olivera

A Computer-Aided Approach for Voltage Reference Circuit Design

Contact

e-mails: folivera@pads.ufrj.br