KUARQ Research Group - Hardware Virtualization

Hardware Virtualization

Hardware Virtualization allows sharing of a hardware's resources among multiple processing units to enhance resource utilization and the overall performance of the hardware. In this process, an abstraction layer is created between software and the underlying hardware. Thus, the software relies on the virtual interpretation of the hardware from the abstraction layer rather than the actual physical hardware. Some of our previous works are given below.

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Virtualizing and Sharing Reconfigurable Resources in High-Performance Reconfigurable Computing Systems

High-Performance Reconfigurable Computers (HPRC) are parallel computers with embedded FPGA chips in systems. HPRCs follow the Single Program Multiple Data Model (SPMD) for the execution of parallel programs. However, the use of FPGAs in these systems as co-processors leads to the underutilization of overall systems resources because of the asymmetric distribution of the reconfigurable processors relative to the conventional processors. This asymmetry makes the use of SPMD challenging for an HPRC system. This challenge can be mitigated by resource virtualization that allows sharing of reconfigurable processors among the underutilized ones. When the ratio of microprocessors, reconfigurable processors, and their communication channels differs from unity, the performance of SPMD programs degrades due to the underutilization of resources. The concept of Hardware Virtualization is an effective technique for overcoming this problem by increasing the availability of hardware resources. As shown in the figure, physical reconfigurable resources (FPGAs) can be virtualized and split into multiple virtual FPGAs (VFPGAs) to accommodate the requirements of the SPMD model. And each VFPGA can be located in a separate partially reconfigured region (PRR) on the physical FPGA. Thus, the application tasks can be distributed across the VFPGAs maintaining a 1:1 correspondence among the tasks and their corresponding resources while providing an SPMD view of the application. Click here to read the reference article.

Single Program Multiple-Data (SPMD) view of reconfigurable resources on High-Performance Reconfigurable Computers

Enabling Ease-of-Use for Extreme-Scale High-Performance Reconfigurable Architectures Using Hardware Virtualization

In extreme-scale HPRC systems, the integration of conventional and accelerator resources in different orientations and proportions makes them imbalanced heterogeneous systems. Thus, porting applications across different HPRCs becomes difficult for domain scientists. This work introduces a virtualization framework to integrate design across different HPRC devices. A portable abstraction layer and run-time libraries are introduced to manage the highly imbalanced reconfigurable resources. In this work, 2 potential solutions are presented: the User-Space solution and the Kernel-Space solution. The User-Space solution gives the user with explicit access to the transfer of control and data exchange which are located in the user-space. However, in the Kernel-Space solution, the execution synchronization is implicit to the user. Moreover, the introduction of Scoreboarding technique mitigates unnecessary hardware configuration time in the kernel- space. Experiments performed on Cray XD1 HPRC showed significant overall speedup using the proposed techniques.

User-Space software architecture

Kernel-Space software architecture