Three-State Buffer

Three-State Buffer / Three-Sate Driver / Three-State Enable

The most basic three-state device is a three-state buffer, often called a three-state driver. The logic symbols for four physically different three-state buffers are shown in the figure below. The basic symbol is that of a noninverting buffer [(a), (b)] or an inverter [(c), (d)]. The extra signal at the top of the symbol is a three-state enable input, which may be active high or active low. When the enable is asserted, a three-state buffer behaves like an ordinary buffer or inverter. When the enable is negated, the device output “floats”; that is, it goes to a high-impedance (Hi-Z) disconnected state and functionally behaves as if it weren’t even there.

Three-state devices allow multiple sources to share a single “party line,” as long as only one device “talks” on the line at a time. The figure below gives an example of how this can be done. Three input bits, SSRC2–SSRC0, select one of eight sources of data that may drive a single line, SDATA. A 3-to-8 decoder with active-low outputs ensures that only one of the eight SEL lines is asserted at a time, enabling only one three-state buffer to drive SDATA. However, if the EN line is negated, then none of the three-state buffers is enabled. The logic value on SDATA is undefined in this case.

Three-State devices have many applications. One important application we will see them in is RAM.