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Results-driven analog IC design engineer with 10+ years of hands-on experience in developing high-performance, low-power ASICs for biomedical systems. Proficient in full-cycle analog design—from schematic to layout (180nm to 28nm) using Cadence Virtuoso, Synopsys, and Mentor Graphics. Successfully led multiple government-funded projects resulting in taped-out chips for neural recording, seizure detection, and speech-to-text systems. Skilled in analog design and layout. Strong collaborator with a proven ability to deliver silicon-proven solutions under tight timelines and cross-functional environments.
Work experience
Work experience
Post-Doctoral Fellow under Visvesvaraya Fellowship
01/12/2025 to Present
Indian Institute of Engineering Science and Technology, Shibpur
Job Description
Analog Mixed Signal Design, PMIC Design
Project Associate-II, C2S
08/09/2025-30/11/2025
National Institute of Technology Silchar
Job Description
Analog Circuit Design and Analysis for Neural Amplifier and Gm-C Filter.
Analog Layout of Analog Frontend using SCL 180nm
Analog Chip Tapeout for Analog Frontend for Epileptic Seizure Detection.
EDA Tools Installation, Lab Setup
Senior Engineer
17/04/2025 - 30/06/2025
Silizium Circuits Pvt. Ltd
Job Description
Analog Layout of complete PLL blocks in TSMC65nm and TSMC28nm node.
Project Associate-II, C2S
06/12/2025 - 16/04/2025
National Institute of Technology, Silchar
Job Description
Analog Circuit Design and Analysis for Neural Amplifier and Gm-C Filter.
Analog Layout of Analog Frontend using SCL 180nm
Analog Chip Tapeout for Analog Frontend for Epileptic Seizure Detection.
EDA Tools Installation, Lab Setup
Guest Faculty
08/11/2021 - 04/10/2022
Assam University Silchar
Job Description
Subject taught Network Theory, Network Theory Lab, DSP LabEDC Lab Microelectronics Technology Embedded System Analog VLSI
Lab Engineer, SMDP-C2SD
26/02/2016 - 31/10/2021
National Institute of Technology, Silchar
Job Description
Analog Layout of Analog Frontend using SCL 180nm and Chip Tapeout,
Analog Chip Tapeout for Analog Frontend for Speech-to-text Conversion,
Analog Frontend with ADC for Neural Signal Recording System
EDA Tools Installation and Lab Setup
Lab Engineer, SMDP-II
15/11/2012 - 02/02/2016
National Institute of Technology, Silchar
Job Description
EDA tool Server Maintenance and Setup Analog Circuit Design and simulation Analog Layout
Education
Education
HSLC(10th) 2002
Primrose English Medium High School, Lala
Percentage: 63.83%
Diploma 2004-2007
Electronics and Telecommunication Engineering
Silchar Polytechnic, Silchar, Assam
Percentage: 71.17%
Bachelor of Technology(B.Tech) 2008-2011
Electronics and Communication Engineering
Sikkim Manipal Institute of Technology, Sikkim
CGPA:7.51/10.0
Master of Technology(M.Tech) 2017-2020
Microelectronics and VLSI Design
National Institute of Technology Silchar
CGPA:8.77/10.0
Doctor of Philosophy(P.hD) 2020-2024
Title of Thesis: Design and Analysis of Analog Frontend Circuits for Neurological Disease Detection.
National Institute of Technology Silchar
Languages Known
English (Fluent)
Bengali(Fluent)
Hindi(Fluent)
References
Prof. K.L. Baishnab Professor Department of ECE,
EMAIL: klb@ece.nits.ac.in
Contact No.: +919435176506
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