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Project Overview:
Project Overview:
Our project, part of the Computer Organization and Assembly Level Programming course (CprE 3810), aimed to design and implement two pipelined processors. The goal was to develop a software-scheduled pipeline initially and then advance to a hardware-scheduled pipeline. We began by implementing a software-scheduled pipeline, which required careful instruction scheduling to avoid hazards without using hardware support. This phase demanded meticulous planning and design to ensure correct execution of instructions across pipeline stages. We then progressed to the hardware-scheduled pipeline, incorporating hazard detection, stalling, and forwarding logic to enhance performance.
My Role:
My Role:
I played a pivotal role in ensuring the timely completion of tasks, delegating responsibilities, and providing guidance throughout the project. I helped coordinate the team’s efforts and facilitated communication to ensure alignment with our goals. I contributed to the project’s planning and schematic design, which involved creating high-level designs for the processor’s pipeline stages and helping to establish the implementation direction.
Software Pipelined Processor Schematic
Hardware Pipelined Processor Schematic
Skills & Knowledge I've Gained:
Skills & Knowledge I've Gained:
I gained hands-on experience in processor design, project management, and teamwork. Working on both the software-scheduled and hardware-scheduled pipeline implementations, I learned how to address hazards through instruction scheduling and later through hardware mechanisms like hazard detection, stalling, and forwarding. This project deepened my understanding of processor design and optimization, which is directly applicable to fields such as embedded systems and digital design in computer engineering. This project allowed me to develop important leadership and communication skills while gaining hands-on experience in processor design, hazard detection, and optimizing pipeline performance. The collaborative nature of the project taught me how to work efficiently in a team environment, fostering skills that are essential for success in the field of computer engineering.
Resources Used:
Resources Used:
For this project, our team relied on various resources to ensure its successful completion. The primary tools used included VHDL for hardware description and simulation, allowing us to design and test both the software-scheduled and hardware-scheduled pipelines. We also utilized simulation environments such as ModelSim and Quartus for compiling, simulating, and debugging our VHDL code, ensuring the accuracy of the processor design. We referred to class resources on pipelined processor design to understand optimal scheduling techniques and hazard mitigation. Additionally, we collaborated closely with our team members, leveraging project management and task delegation and communication through Discord, allowing us to maintain effective coordination. Our design was further refined through iterative testing, debugging, and peer review, ensuring the processor met both performance and correctness standards.
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