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The presented system is targeted to acquire sensor data (from encoders, accelerometers, magnetometers, AD) installed on mechatronic constructions, handle relatively large sensor data streams and provide real-time supervisory control (predictive controller, linear-quadratic controller) with very low latency. The described architecture is characterised by low cost and hardware simplicity through the use of standard 32-bit processors with an ARM/CortexM core with a built-in USB port. The proposed architecture also has a wide range of potential applications. Such a system can be a framework of embedded acquisition-recording devices, including energy quality measurements, smart-grids and medicine. Due to the cooperation of many software modules and interactions with operating system, there is a need to conduct an experimental real-time performance study.

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The professional literature suggests SPI as the interface of choice for the sensor and actuator module [10] and these ports are present in microprocessors with the ARM/CortexA core. In a COTS-based solution, however, this might require an intervention in the electronics and make the design overly complicated. Other solutions for integration suggested by researchers have included designs based on an SD port and dedicated hardware with the built-in Secure Digital Card Input/Output standard [11,12]. These examples were demonstrated to convert data for a relatively slow ZigBee network with throughput on the order of 20 Kbit/s. A similar idea applied in medical equipment known as a body sensor is presented in [13]. SD-based solutions tend to have limited applications. Such placement of the acquisition module in an SD port not only eliminates the option to log large amounts of data on SD cards, but it can also be even physically impossible to implement in some devices where MicroSD ports are placed inside.

In the experimental study conducted by the author, an Archos 80 G9 tablet was used as the high-level control module, recording and visualisation [32]. It is equipped with a Texas Instruments OMAP4-class processor [33] with a Corex-A9 dual core and is clocked at 1 GHz. An integrated nVidia Tegra2 graphic accelerator is primarily intended for handling the graphical touch-sensitive liquid crystal display (LCD) in order to relieve some of the main core processing power for data processing, including numerical computing for control purposes.

The microsystem is equipped with a wide range of peripherals including an AD converter, quadrature encoder, SPI, I2C and UART ports and PWM controller. The AD converter allows performing measurements of sixteen channels at a sampling rate of 1 million samples per second (depending on the programmed resolution). During data exchange, these devices can use a multichannel direct memory access (DMA) controller, which takes the communication load off the main core. In the proposed solution, the DMA handles AD converter and UART and SPI ports. This gives the core more time for data processing operations. External sensors such as accelerometer, gyroscope and magnetometer are attached to the microsystem.

Moreover, the solution implemented during the study was mainly intended to control mechatronic constructions but its areas of use go far beyond that. Indeed, the proposed solution has universal nature due to its compactness and low development cost that is reduced to a single-chip microsystem, a direct USB link and no additional specialised integrated systems or converters. In terms of the software, typical programming libraries available from the operating system were employed without any need to develop specialised drivers for the device. The software can be adapted for applications in the areas of automation, robotics, personal medical devices, smart-grids and wind farms. A COTS device running Android lends itself to easy integration with other computer systems via wireless (Wi-Fi, Bluetooth) or mobile (GSM/3G) connectivity. The results obtained are relevant to other SoC microsystems with ARM, Cortex, MIPS, AVR32 cores or FPGA systems with a USB device port macrocell.

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