Board design and Current flows…

The typical IoT device board has several SoCs which integrate processors, peripherals and power management. Each component may operate at different clock rate, and, since CMOS circuits consume power mostly on clock transitions, they create power surges at different frequencies. While a simple SPI interface may create spikes with the amplitude of few milliamperes, the CPUs, DRAMs and Class-D power amplifiers can easily exhibit instantaneous power surges at 0.5-1A and above.

The Ohm’s law says that the voltage drop or series noise generated by such surge is proportional to the impedance of the current path, for series connection it is:

V= I*(Rp+jωLp) – where Rp and Lp are parasitic resistance and inductance of the copper traces and planes. The designer would want to isolate the path for the return currents to smallest possible area and avoid uncontrolled current paths where they could run together with sensitive analog signals.

Figure 1 Switching current paths

The picture (Figure 1) shows equivalent schematics of such CMOS circuit on the board with corresponding parasitic elements. It illustrates a typical mistake where two ICs are placed far away on the board, but the supply pins are connected together through large common polygon shapes or planes, and more bypass capacitors happened to be located around IC2. As the result, the current spikes from IC1 are split into the shorter, but higher impedance path through Cbp1, and a longer but lower impedance path through Cbp2..CbpN. This path may create a voltage drop which is applied to sensitive circuits as series interference voltage, and may destroy the sensitivity of the device. While it may seem that the “plane” is a good ground reference, the layer switch and vias create additional non-zero impedance inclusions and thus the current paths may be rather unpredictable.

The designer may want to find and isolate such current flows by introducing higher impedance or notches into the undesirable current paths, introducing ferrite beads or resistors to split common Vcc nodes, and keep current loops localized. But when the board is already made and not functioning as expected, the oscilloscope with inductive, galvanically isolated current probe may be essential to find bad current paths.

We need to remember that the AC currents produce magnetic field perpendicular to the direction of the current flow. Since typical surge frequency is equal to clock frequency, it is essential to be able to measure AC magnetic field at 1..50MHz frequency range.

There are three commonly found types of sensors for magnetic field: inductors, Hall effect chips and giant magnetoresistance elements – the latter are found in the read heads of hard disk drives. While Keysight sells magnetic current probes, they are rare and expensive, so a humble hobbyist can build decent troubleshooting probes (Figure 2) from analog 4-terminal Hall sensors salvaged from brushless motors of fans.

Figure 2 Magnetic Field Probes

The signal from these currents will be very weak, and a differential to single ended wideband amplifier will be needed; the ICs for read channels of disk heads or OpAmps like LT1818 may be used. The gain needs to be ~100. The amplifier should be placed in the probe to avoid sending low voltage signals through long cable.

The magnetic pickup is similar, one can use a small SMD inductor which internally has a coil on a ferrite core. The 1-3uH chip inductor may be suitable. I put such pickup probes into a heat-shrink tubing and use toothpick as a handle.

Why do we need galvanic isolation? Most instruments have a power plug ground connected to chassis and the body of BNC connectors are also connected to the same chassis for safety. At the same time, the bench power supplies and instruments contain switching mode power supplies, which introduce burst switching noise. This noise is partially injected into the ground leads. When such supplies and instruments are connected to device under test, the additional noise current path through probes and ground in power plug is created, and this path introduces as much as 50-100mV high frequency, wide band surges into oscilloscope measurement. While it is possible to reduce it by using battery-powered oscilloscopes and pure linear power supplies – which I do have, it may be more practical to isolate a sensitive probe completely and not distort extremely weak signals from the probe.

Now we could move the coil across the board and see if it picks any AC signal on the highest sensitivity of the oscilloscope. The direction of magnetic field is perpendicular to the surface of the board, so the Hall sensor should be flat on the board surface, and the coil pickup with an axis perpendicular to the board.

If sensitivity of the scope is sufficient, the problem is enough severe. Now one needs to identify the source of the undesired current. FFT spectrum feature (Figure 3) and deep memory for better spectral resolution in DSO could help.

Using oscilloscope zoom on FFT display, identify the strongest peaks and try to associate their frequencies to ICs which could generate them. Typically, they are related to clock and output data signals of the ICs, and frequency can be estimated by probing major signals and using frequency measurement function of the scope.

The amplitude of some peaks will change when the probe is hovered around the board. By mapping the strength of the selected frequency peaks to locations on the board, one can trace the problematic paths. If a frequency from one IC is found far away from it, it indicates a problem. Consider how to break paths by changing the layout or introducing additional resistors or inductors.

Figure 3 Display FFT spectrum of captured signal

This method helps to check how well the primary path, the synchronous rectification path and the load paths are isolated from the rest of the board in switching regulators. Many published guidelines tell how to do it, but some designs partially or completely ignore them, and switching currents are spread through ground and power planes.

https://www.maximintegrated.com/en/design/technical-documents/tutorials/2/2997.html

The high switching current paths are common for the “Class-D” (switching) audio amplifiers, which can deliver from 1-2W in mobile devices to several hundreds watts in home theaters. These currents must be confined within smallest area around the output of the amplifier, and do not escape to other areas of the board or load terminals. Identifying the flow of high switching currents is not very difficult, but it allows to improve the noise and radiated EMI.

What if the signal is not seen on the oscilloscope FFT plot?

This is the typical situation when mapping the noise generated by data buses and traces. It is responsible for cross-talk between high speed and analog traces on the board. Once, the trace on the bottom layer was inducing noise on the crystal pins on the top layer – through the board – and it was creating an unexpected jitter and frequency modulation in the digital radio. We will talk about jitter later, and now let us see what can be done to trace weak signals which hide on visually random trace?

I keep RF spectrum analyzer for this purpose – it can be tuned to a much narrow frequency range and has higher sensitivity. Its use is the same as described above - selecting the desired frequency component in narrow band receiver mode, and look at the intensity of the signal while hovering magnetic probe above the board. But if the spectrum analyzer is not available, the oscilloscope with additional Python or Matlab software may also be suitable to implement what is called a synchronous reception to increase the sensitivity.

Connect first trace of the scope to the clock signal of interest and trigger from this signal. Connect the magnetic probe to the second trace and capture as many sample points as scope allows (so that the sample frequency is at least 2-3 times higher than the clock frequency). Now, use the USB or GPIB acquisition interface to transfer collected samples to PC. With the software, we will now build a digital narrow band radio receiver by doing the following:

1. Apply FFT to the first trace and determine the base frequency. Alternatively, if the signal looks like a periodic square wave, determine the distance in samples between several periods of the signal, searching for instance for the rising edge transitions. If the number of edges is around 100 in the recording, it gives rather accurate estimation of the signal frequency. We need to find how many samples is within the full period of the aggressor signal.

2. Generate a sinewave and cosine wave array for the found frequency and entire duration of the signal capture. If 1M points is sampled, then it will be 1Mx1 array.

3. Multiply the array containing samples from magnetic probe and generated Sin and Cos arrays, and sum the elements of each product. In radio this is called synchronous, or homodyne detection.

It is obvious that in step 3 we calculated single frequency Fourier integral (Discrete Fourier Transform) and obtained in-phase (I) and quadrature (Q) values of the transform at our signal frequency. In other words, we applied a very narrow-band filter centered at our Sin(wt) frequency. Because of that, we greatly increased our sensitivity well beyond the 8-bit ADC resolution in the scope, and also removed all wideband noise.

It was really great that the captured signal was noisy – it dithered least significant bit of the oscilloscope ADC, and effectively increased the resolution of ADC by SQRT(Npoints). In reality, the ADC is not ideal, but going from 8-bit to 12-14bits with this method is real.

One improvement, which completely eliminates the offset of ADC and dependence on the sample stream length is to apply some windowing function (Tukey, Blackman, etc…) to the captured trace. We refer to texts on digital signal processing for details.

Now, we want to display the magnitude of our pickup signal as SQRT(I^2+Q^2) in the GUI or command line and use this value for current mapping. The acquisition and processing as described may be refreshed at 5-10Hz on a typical computer, so the high-sensitivity detection is quite usable.

Frequency selective Measurements for several carriers

The above method for a single frequency is faster than FFT, but it only allows to measure at one frequency at a time. It may be desirable to display intensity of several selected frequency components from the same signal capture to save time. Usually, the list of frequencies in the boards is not long and 4-5 different frequencies may be sufficient. Then, the software may generate few Sin/Cos arrays, each pair for a desired frequency, and then multiply and accumulate to produce spectral density at each of these frequencies as shown in the picture above. Again, the resolution of the result will exceed the limited resolution of oscilloscope ADC.

Assessing Inductive coupling and clock jitter.

A naïve assumption that a metal shield can screen sensitive signals is not exactly true. The conductive Faraday cage isolates the DC and low-frequency electric fields. But magnetic fields generated by switching currents in traces cannot be easily isolated. They propagate through the multilayer boards, and are responsible for inductive coupling between signals laid as parallel traces. The analog and clock signal are most sensitive to inductive coupling.

Figure 4 How jitter is introduced by inductive noise coupling

The current surges from one trace will induce the voltage on another trace, and, given that the clock rise and fall times in low-noise designs are intentionally limited, the clock transitions seen by a receiver will have unexpected jitter. Figure 4 illustrate how induced voltage (red) modifies the time when the signal crosses the receiver’s logic level threshold.

The DSOs have infinite persistence mode which helps identify the jitter. The capture is triggered on the clock edge, so the infinite persistence will show the sum of the rising and falling edge jitter. Using 1Gsa/s scope, it is possible to detect peak-to-peak jitter within ~2ns. The low sampling rate of entry level oscilloscopes limits the jitter detection capability, but the limited bandwidth of the inputs does not. Some entry level DSOs have equivalent sample time mode, where the sampling points are slightly shifted relative to trigger point in sequential traces, thus allowing to capture transitions at higher temporal resolution. Equivalent time works for repeating signals only, and, together with the infinite persistence can capture smaller clock jitter.

The other jitter-creating effect of the noise is direct modulation of the VCO when it penetrates into the analog phase tracking loop in PLLs. Power supply noise and ripple add small offsets into the phase error signal, and the output of the PLL becomes phase modulated.

In this case the spectrum of the clock generated by such VCO is not uniform. It contains high frequency phase noise in VCO, modulation of the VCO in the frequency range above the cutoff frequency of the PLL feedback loop, and a lower frequency wander.

When troubleshooting the reason for excess jitter and errors in the communication system, one can compare period-to-period jitter looking at adjacent edges of the clock signal with infinite persistence, and looking at the edges far away in time from the trigger point with a delayed horizontal time base setting. If the jitter area on distant edges is the same as period-to-period jitter, there is no low frequency wander.

But if the infinite persistence on far edges is different, one can conclude that frequency modulation is occurring. The frequency of the modulation may be estimated by varying the delay: increasing the delay will first show increased jitter, and with further increase of delay the jitter may decrease.

Such behavior tells that there is periodic frequency modulation and its period is equal to the delay where jitter became minimal again. The inverse of this period is the modulation frequency. Comparing this frequency with that of signals found in different units, one can identify the source and understand how these signals are penetrating to PLL.

The delayed time base jitter estimation will only work if the oscilloscope clock has very low jitter (assuming Keysight has a good time base clock).

Signal Injection and Arbitrary Waveform Generator

Detecting Shorts and questionable traces on the boards.

The current tracing on the powered or unpowered board may be used to find shorts between traces and planes. In this method, the output of the AWG (usually sinewave) can be injected into one node of the circuit, and the current paths traced across the board. Since shorts usually have very low resistance (in the order of tens or hundreds of milli-Ohms), it is desirable to inject ~0.5-1A of 1-10MHz sinewave. The AC voltage will be below 1V, so it usually does not introduce a risk of destroying populated components and ICs.

However, the typical AWGs can only drive 50 Ohm loads, so a power amplifier for current injection is needed. I used LT1739 (dual 500mA, 200MHz) xDSL driver with two channels in parallel and 5 Ohm limiting resistors as the amplifier to feed up to 1A high-frequency current into the circuit.

The injection should be done with a twisted pair or coaxial cable to limit the magnetic field from the injection wires and avoid misleading traces. The injection points need to be also as close as possible.

The oscilloscope is configured with one trace showing the reference sinewave, and another picking the signal from magnetic probe. The FFT analysis plot is usually sufficient for the unpowered boards, because there will be no interfering alternative signals and the injection current is rather high. The goal of the traces to find the boundary where the current is present. Sometimes, one may observe the increase of the amplitude of the signal in alternative direction, for instance, parallel to the board, around the areas where the current flows through vias. Looking at anomalies, it is possible to find short circuit links.

If the high-frequency differential probe is available, the voltage drop of injected current on the traces may be detected. The differential probing is used together with magnetic probing because it works through solder mask coating.

If the signal amplitude is not sufficient for internal oscilloscope FFT measurements, the PC-based synchronous detection may increase the sensitivity as described above.

Measuring inductance and Checking saturation in Power Inductors

The dual-trace digital oscilloscope is a great instrument to test and troubleshoot power inductors and multilayer ferrite beads. I am using two methods: a pulse method and the impedance bridge method.

Is Power inductor operating above saturation current?

In this method we feed the voltage pulse into the inductor and record the current flowing in with some current probe. The current probe may be just a low-resistance metal film resistor or a piece of nichrome wire, so that the voltage drop on it will be lower than ~100-200mV at maximum current (typically, 0.1...0.05 ohm resistors are used). The voltage pulse is produced by TTL output of the AWG which drives gate of N-type or P-type power MOSFET.

If the indictor is in linear mode (normal operation), the rate of current growth though inductor dI/dt =Vin/L, see Figure 5. But saturation of the inductor is reducing L, and the rate of voltage increase grows. The extra current through the inductor will not accumulate the magnetic field, and will not return the energy into the output of switching power supply, reducing the efficacy.

In Figure 5a, The dual channel AWG generates the gate control square wave pulse for MOSFET on one output, and a linear ramp on the other output which will be used as a time coordinate for the oscilloscope. The great function of digital scopes is X/Y display, when one trace (A) will be used as abscissa, and other as ordinate. In our case, the inductance is inversely proportional to the linear slope of the plot on the screen if the scales are calibrated. For 5V supply, current sense resistor 0.1 Ohm and L=1mH, the dV/dt=0.1*Vin/L, or 0.5V/us.

Figure5b shows the effect of saturation on the scope screen. The duration of the pulse should be adjusted on AWG until one can clearly see the saturation start, but not to go too deep into saturation to prevent damage to inductor. Since the horizontal coordinate is driven by the AWG waveform, the return trace when current flows through Schottky diode is not smearing the picture.

If the oscilloscope has a division operation in Math mode, the inductance may be directly measured as L= 0.1*Vin*TraceB/TraceA, averaged across all points for better accuracy.

The acceptable saturation current for most high performance switching regulators is ~5% deviation from linearity.

What if the inductance is lower than 0.5uH?

The high frequency AWG and dual trace oscilloscope is a great tool for AC vector measurements, when a dedicated LCR bridge is not available. See details of vector impedance measurements with AWG and DSO here. This method is best for checking if ferrite beads used in the design saturate, or measuring the value of low-value inductors as AWG may feed the inductor with MHz frequencies.

AWG and Oscilloscope for testing
failing and misconnected semiconductors.

This is a well forgotten technique which, IMHO, should be integrated into every digital scope. Once upon a time there were I/V curve tracer adapters for the oscilloscopes. They may be easily implemented with AWG and DSO. The adapter sends a ramp, triangle or sinewave current into the tested node, and captures the voltage on it. If the node contains capacitor, inductor or non-linear semiconductor, the I/V plot on DSO screen will help identify them (Figure 9).

Since the AWG can output amplitudes of +/-10V and above, the nearly load-independent current may be obtained by simply connecting a large (~10kOhm) series resistance to make a following circuit (figure).

The common (“ground”) of AWG and scope can be connected to ground supply rail of the device under test, and verify the sanity of the inputs of the CMOS circuits and its ESD protection diodes, or it can be connected to +Vcc supply rail and then the upper ESD protection diodes can be checked.

The AWG is configured to output triangular or sine waveform at 5-10kHz with the amplitude within tolerable voltage range of CMOS ICs. If the nodes of interest have capacitors or inductors, the lower frequency may be better. The scope is configured in X/Y display mode.

The example I/V curves are shown above. The AWG’s ability to control the offset helps set the viewing region including ~1V negative and ~5V positive.

Fig. 1 shows the action of both ESD protection diodes when the I/O pin has no power. The signal is clipped at ~0.6V. The open drain I2C output has no upper ESD protection diode, and the clipping occurs only in the bottom (fig 2). When power is applied, the unconnected input will show clipping by biased upper ESD diode at Vcc+0.6V. The CMOS outputs will exhibit the same “floating” behavior, but if powered, it will show the curve stuck at high or low level. One can troubleshoot the circuits and find undriven, shorted and driven circuits with resistive or inductive loading non-destructively using curve tracing at different frequencies.

By changing the frequency of the excitation signal one can detect parasitic capacitance on the inputs when higher frequency is set – the more capacitance will result in splitting of the curve in its middle (1). Setting frequency in the order of few hundred Hz eliminates visible phase shift and thus splitting.

Measuring frequency response and tuning low-frequency filters

The frequency sweep and FM modulation functionality of AWG makes it very easy to plot frequency response of filters and amplifiers within the output frequency range of the AWG, realistically to 50MHz.

FM modulation and Infinite persistence display

Let us use a frequency modulation method because it works on most of DSOs. We will plot a frequency response of FM radio intermediate frequency amplifier with 10.7MHz SAW filter. This filter is insufficiently loaded, and that is why the frequency response is not perfect and loading requires adjustment. The AWG is configured to produce a sinewave on channel 1 with the center frequency of 10.7MHz and feeds the input of SAW filter. The second channel is used to modulate the carrier with a linear ramp with frequency span of 1.4MHz at a rate of 50kHz.

The horizontal axis of DSO is taking the ramp and synchronizes on it. The vertical axis samples the output of the filter. The oscilloscope will capture the modulated sinewave, and it would be difficult to interpret, because the signal and timebase are not synchronized.

But if the display us set for infinite persistence, the frequency response will look traditionally and the bandwidth may be accurately measured, and, for tunable LC filters, the frequency response may be adjusted as desired. Different DSO use different methods of skipping points for lower frequency sampling. In example below, older OWON simply decimates the samples, which limits the ratio between the signal frequency and modulation. Rigol performs anti-aliasing average and multi-pass averaging of collected data points, so the pictures are more smooth.

The examples below were taken with 10.7MHz saw filter and more exotic 21.7MHz narrow-band, 8-pole quartz crystal IF filter.

Of course, a better approach would be to display peak values and also plot Y axis in logarithmic scale but the current oscilloscopes cannot do it. We will improve it with Logamp probe in next chapter.

Frequency sweep with XY display

My AWG can sweep the output frequency in linear and logarithmic modes, which is convenient for wide band frequency response plotting. However, sweep coordinate is not available externally, and cannot drive the X coordinate of the scope display. The Y coordinate may be taken from the output of the device under test, but unfortunately, the infinite persistence is not available for the XY mode on one of the scopes.

I read that Keysight DSOs can plot amplitude and phase to display the Bode plot, but similar mode is not available on my instruments. It would be interesting to evaluate this feature.

Tuning WiFi and Bluetooth Antennas and Filters in GHz domain

It is always great to have capable test equipment, but some simple tasks in challenging RF and microwave domain (50-6000MHz) may be performed with the entry level AWG and scope. We will construct a microwave sweep generator and receiver with few additional low-cost modules and SMA cable assemblies:

The bench setup options are shown below, and they provide accurate enough representation of the transmission amplitude or WSWR of WiFi or Bluetooth patch antennas and distribution amplifiers.

The first option uses open loop VCO, and the 14-bit AWG linearizes frequency scale of the VCO. The open loop architecture allows to scan the entire band at a rate of few kHz, which helps tuning because the frequency response plots are updated very fast. The plots are displayed in logarithmic scale to help convenient interpretation in dB/division on the screen. The disadvantage of this setup is lower accuracy of the frequency scale.

The second option provides crystal controlled accuracy of frequency scale, and additionally allows to instantly set reference frequencies from control knob of the AWG. It uses the modulation feature of the DDS to create linear or arbitrary sweep, where one channel of AWG is used to modulate the other channel, which, in turn, drives the reference clock to PLL. As in the above option, the modulation channel drives the X trace of the oscilloscope, while Logamp drives the Y channel. The disadvantage of this option is the limited speed of the tuning, limited by the tracking loop bandwidth of PLL. However, since the DDS is a phase continuous source, the actual sweep rate can reach 1-2K points per second.

Active Power Management and Software Performance Tuning

The deep memory, dual trace DSO is very useful when the microprocessor-based device can dynamically enable and disable its peripheral and memory states, and go into low power and micropower sleep states. However, using just intuition may not be the best option to allocate power states to software tasks. It is also possible to arrange tasks to perform the same workload, but with different total consumed power. For instance, it may be more efficient to combine processing of multiple interrupt driven events in a single lump block, and keep the processor in low power state when enough workload did not accumulate.

The power management optimization may be easier, if dual-trace plot displays simultaneously the power consumption and the type and duration of each microprocessor task or power state. The time resolution of recording should be co-measurable with the time duration of firmware function execution. For most embedded controllers 1-2Msample/s rate is sufficient even to accurately record the fastest interrupt handlers. The 200k sample recording allows to record 200ms of software execution on Keysight DSO, and longer if more coarse granularity is sufficient.

The power consumption may be captured by recording the DC supply current. One can put in a 0.1 Ohm series sense resistor in the supply line and capture the voltage; 0.1mV/mA. But both ends of the sense resistor will be at the voltage level of the power rail, in most cases ~3-12V. Measuring few millivolts on the background of supply voltage is not possible directly. One may use a fixed gain wideband instrumentation amplifier (like MAX4172) or differential probe to convert this small voltage into ground based, larger voltage for current trace of the oscilloscope.

But we could also use the Hall-effect sensor to measure the magnetic field induced by the current flowing through the supply wire. Depending on the current level, it may be sufficient to simply glue the sensor on the supply wire, or, construct a coil of several windings around the sensor. Such setup needs to be calibrated to give 1-5% accuracy. Ready-made Hall effect sensors are also available.

But how do we display the states of the software on the same time axis? If the microprocessor has SPI interface, it may be convenient to build a simple 3-4 bit “digital to analog converter” and let the software write its identifier on entry of each traced task or interrupt handler. The 16-level output of 4-bit DAC is easily interpretable on the scope screen and allows to encode 16 different IDs. The output of DAC will go to the second input of the DSO. The start of recording task may output the maximum ID to use it to trigger the single-shot recording.

The recording then will contain instantaneous supply current on the first trace, and task ID on the second trace. The analysis and visualization will be more convenient when the data is transferred to PC and processed by software like Sigrok Pulseview or dedicated Python script.

Summary

We demonstrated the versatility of entry level oscilloscopes and AWGs for following:

· Analyzing and mapping high frequency noise currents in the PCBs, including high-sensitivity measurements with the help of single- and multi-frequency Fourier integration

· Detecting reasons and finding the root causes for excess signal jitter and estimating its frequency components

· Detecting damaged semiconductor devices, opens and shorts in the board using I/V curve tracer

· Measuring small inductance and capacitance in bridge mode by phase/amplitude measurements

· Assessing the saturation currents of power inductors for optimizing switching regulators

· Measuring and plotting the frequency response of devices within the frequency range of AWG (typically up to 60MHz) for tuning

· Measuring and plotting the frequency response for the RF and microwave bands (50-6000MHz) in multi-GHz antenna and filter tuning

· Software profiling and active power management tuning in power critical embedded and mobile devices

The additional low cost modules, probes and setups needed to expand the DSO functionality are described. While these methods are implemented on the generic entry level oscilloscopes and Arbitrary Waveform Generators, they should be implementable on Keysight SmartBench instruments with as good or better results.