M.Tech. (Electronics & Telecommunication Engineering : Specialization_ Microelectronics & VLSI Design, IIEST Shibpur) / 2023
Thesis Title :~
Optimization of 5T LC Architectures Using SPICE-PIDE
1) Arun K P (Analog Design Engineer, Synopsys India Pvt. Ltd.)
M.Tech. (Electronics & Telecommunication Engineering : Specialization_ Microelectronics & VLSI Design, IIEST Shibpur) / 2022
Thesis Title :~
A New Energy Efficient Level Shifter Design in order to Detect sub 100 mV Signals
2) Jehan Taraporewalla (PhD, IIT Delhi)
Thesis Title :~
Interfacing of TSO 5T Level Converter with Pass Transistor based Ultra Low Power Digital Circuit
3) Sarvam Kesharwani (Application Engineer, Simyog Technology)
B.Tech. (Electronics & Telecommunication Engineering, IIEST Shibpur) / 2021
Thesis Title :~
First-principles based Calculations of Thermal Properties of Single Layer MoSe2 and WSe2
1) Yuvam Bhateja (MS, Politecnico Di Milano, Italy)
2) Joshua Roy Palathinkal (PhD, Drexel University)
3) Tamajeet Mandal (MTech, IISc Bangalore, India)
4) Pronay Roy
B.Tech. (Electronics & Telecommunication Engineering, IIEST Shibpur) / 2022
Thesis Title :~
An Accurate SPICE-PIDE Interface based Design Optimization Method for Integrated Circuits
5) Sugata Ghosh (MTech, IIT Kharagpur)
6) Abhishek Agarwal
7) Bijaydoot Basak
B.Tech. (Electronics & Telecommunication Engineering, IIEST Shibpur) / 2023
Thesis Title :~
Determining the Efficacy of LDA-PZ-PseudoDojo for the Calculation of Electronic and Structural Properties of c-BAs and h-BAs
8) Dyutimoy Chakraborty (PhD, Georgia Tech)
9) Snehami Pandab
10) Aditi Singh
11) Sarvesh Kumar Bind
B.Tech. (Electronics & Communication Engineering, IEM Kolkata, Saltlake) / 2024
Thesis Title :~
Electronic properties of ReS2 / MoTe2 vdW heterointerface with S-vacancy : Effect of Mo and O adsorption
12) Puneet Kumar Shaw (IBM, India)
13) Sohaib Raza
14) Akash Kumar
15) Rimisha Duttagupta