Byeong Yong Kong, "Fault-Tolerant Algebraic Interleaver Architecture for IDMA Systems in Harsh Environments," Journal of Semiconductor Technology and Science, vol. 25, no. 2, pp. 191–198, Apr. 2025.
Byeong Yong Kong, "Low-Latency PAPR Reduction Architecture for Discrete Multitone Based on Approximate Midrange," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 32, no. 12, pp. 2398–2402, Dec. 2024. (IEEE SPS/CASS Journal Paper Presentation at IEEE SiPS 2025)
Jaehee Kim, Sangil Han, Dongyun Kam, Byeong Yong Kong, and Youngjoo Lee, "A Design Framework for Cost-Efficient Sorters with Arbitrary Input/Output Constraints," IEEE Transactions on Circuits and Systems—I: Regular Papers, vol. 71, no. 12, pp. 5410–5419, Dec. 2024. (Invited Paper to the Special Issue on IEEE ISCAS 2024)
Byeong Yong Kong, "Conversion-Less Algebraic Interleaver Architecture for Low-Latency IDMA Systems," Electronics Letters, vol. 59, no. 13, pp. 1–3, Jul. 2023.
Dongyun Kam, Byeong Yong Kong, and Youngjoo Lee, "Low-Latency SCL Polar Decoder Architecture Using Overlapped Pruning Operations," IEEE Transactions on Circuits and Systems—I: Regular Papers, vol. 70, no. 3, pp. 1417–1427, Mar. 2023.
Byeong Yong Kong, "Fixed-Latency Architecture for Multi-Stage Algebraic Interleavers in Interleave Division Multiple Access Systems," Electronics Letters, vol. 58, no. 22, pp. 822–824, Oct. 2022.
Byeong Yong Kong, "A 97-mW Bitwise-Early-Terminating Multiuser Detector for IDMA Systems," IEEE Transactions on Circuits and Systems—II: Express Briefs, vol. 69, no. 8, pp. 3390–3394, Aug. 2022. (IEEE CAS Transactions Paper Presentation at IEEE MWSCAS 2023)
Sangbu Yun, Byeong Yong Kong, and Youngjoo Lee, "Area- and Energy-Efficient LDPC Decoder Using Mixed-Resolution Check-Node Processing," IEEE Transactions on Circuits and Systems—II: Express Briefs, vol. 69, no. 3, pp. 999–1003, Mar. 2022.
Byeong Yong Kong, Youngjoo Lee, and Hoyoung Yoo, "On the Hardware Complexity of Tree Expansion in MIMO Detection," Journal of Semiconductor Engineering, vol. 2, no. 3, pp. 136–141, Dec. 2021.
Byeong Yong Kong, "Bitwise Early Termination of Multiuser Detection for IDMA Systems," IEEE Communications Letters, vol. 25, no. 9, pp. 2998–3002, Sep. 2021.
Suchang Kim, Seungho Na, Byeong Yong Kong, Jaewoong Choi, and In-Cheol Park, "Real-Time SSDLite Object Detection on FPGA," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 6, pp. 1192–1205, Jun. 2021.
Byeong Yong Kong, "Low-Complexity Address Generation for Multiuser Detectors in IDMA Systems," Electronics, vol. 9, no. 12, pp. 1–9, Dec. 2020.
Byeong Yong Kong, "Multi-Touch Detector Architecture Based on Efficient Buffering of Intensities and Labels," Electronics Letters, vol. 56, no. 14, pp. 699–701, Jul. 2020. (Featured Article)
Jaewoong Choi, Byeong Yong Kong, and In-Cheol Park, "Retrain-Less Weight Quantization for Multiplier-Less Convolutional Neural Networks," IEEE Transactions on Circuits and Systems—I: Regular Papers, vol. 67, no. 3, pp. 972–982, Mar. 2020.
Byeong Yong Kong and In-Cheol Park, "A 120-mW 0.16-ms-Latency Connectivity-Scalable Multiuser Detector for Interleave Division Multiple Access," IEEE Transactions on Circuits and Systems—II: Express Briefs, vol. 67, no. 3, pp. 470–474, Mar. 2020. (IEEE CAS Transactions Paper Presentation at IEEE ISCAS 2020)
Hwasoo Shin, Soyeon Choi, Jiwoon Park, Byeong Yong Kong, and Hoyoung Yoo, "Area-Efficient Error Detection Structure for Linear Feedback Shift Registers," Electronics, vol. 9, no. 1, pp. 1–10, Jan. 2020.
Byeong Yong Kong, Jooseung Lee, and In-Cheol Park, "A Low-Latency Multi-Touch Detector Based on Concurrent Processing of Redesigned Overlap Split and Connected Component Analysis," IEEE Transactions on Circuits and Systems—I: Regular Papers, vol. 67, no. 1, pp. 166–176, Jan. 2020. (IEEE CAS Transactions Paper Presentation at IEEE ISCAS 2020)
Byeong Yong Kong and In-Cheol Park, "A Memory-Efficient IDMA Architecture Based on On-the-Fly Despreading," IEEE Journal of Solid-State Circuits, vol. 53, no. 11, pp. 3327–3337, Nov. 2018. (Research Highlight in Nature Electronics)
Byeong Yong Kong and In-Cheol Park, "Hybrid Sorting Srchitecture for Low-Latency Successive Cancellation List Decoding of Polar Codes," Journal of Semiconductor Technology and Science, vol. 18, no. 5, pp. 593–601, Oct. 2018.
Byeong Yong Kong and In-Cheol Park, "Improved Sorting Architecture for K-Best MIMO Detection," IEEE Transactions on Circuits and Systems—II: Express Briefs, vol. 64, no. 9, pp. 1042–1046, Sep. 2017.
Byeong Yong Kong, Hoyoung Yoo, and In-Cheol Park, "Efficient Sorting Architecture for Successive-Cancellation-List Decoding of Polar Codes," IEEE Transactions on Circuits and Systems—II: Express Briefs, vol. 63, no. 7, pp. 673–677, Jul. 2016.
Byeong Yong Kong and In-Cheol Park, "Fast Detection for Spatial Modulation MIMO Based on Cost Estimation," Electronics Letters, vol. 52, no. 8, pp. 671–673, Apr. 2016.
Byeong Yong Kong, Jihyuck Jo, Hyewon Jeong, Mina Hwang, Soyoung Cha, Bongjin Kim, and In-Cheol Park, "Low-Complexity Low-Latency Architecture for Matching of Data Encoded with Hard Systematic Error-Correcting Codes," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 22, no. 7, pp. 1648–1652, Jul. 2014.
Byeong Yong Kong and In-Cheol Park, "Efficient Tree-Traversal Strategy for Soft-Output MIMO Detection Based on Candidate-Set Reorganization," IEEE Communications Letters, vol. 17, no. 9, pp. 1758–1761, Sep. 2013.
Byeong Yong Kong and In-Cheol Park, "Hardware-Efficient Tree Expansion for MIMO Symbol Detection," Electronics Letters, vol. 49, no. 3, pp. 226–228, Jan. 2013.
Byeong Yong Kong and In-Cheol Park, "FIR Filter Synthesis Based on Interleaved Processing of Coefficient Generation and Multiplier-Block Synthesis," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 31, no. 8, pp. 1169–1179, Aug. 2012.