[Jun. 2026] Juhyeon Lee and Juseon Park have won the Encouragement Award at the Semiconductor-Specialized University Capstone Design Contest, 2026 KIEEME Summer Conference, Busan, South Korea, Jun. 2026.
[May 2026] Juhyeon Lee and Juseon Park have won the Bronze Prize at the 2026 Semiconductor-Specialized University Capstone Design Contest Preliminaries.
[May 2026] Hyotae Kim and Juyoung Chae have won the Encouragement Award at the 2026 Semiconductor-Specialized University Capstone Design Contest Preliminaries.
[Apr. 2026] Our paper entitled "Low-Complexity Shifting-Based PAPR Reduction for Multicarrier Modulation Using Subsamples: Parallel and Serial Architectures" has been accepted for publication in the IEEE Access.
[Dec. 2025] Our paper entitled "Fault-Tolerant IDMA Multiuser Detector Based on Fault Injection Analysis of Internal Memories" has been accepted for publication in the IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
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Digital Circuit Architectures Laboratory (DiCALab) is a research group in the Division of Electrical, Electronic, and Control Engineering, Kongju National University, Cheonan, South Korea. We aim to improve both algorithmic and architectural aspects of digital systems for various applications, e.g., telecommunications, artificial intelligence, and digital signal processing. In doing so, we renovate underlying algorithms to make them more suitable for hardware implementation, and develop energy-efficient architectures for VLSI circuits. To demonstrate the efficacy of our ideas, furthermore, we realize the corresponding systems on FPGAs and ASICs.
If interested, please do not hesitate to contact Prof. Byeong Yong Kong.