[Dec. 2025] Our paper entitled "Fault-Tolerant IDMA Multiuser Detector Based on Fault Injection Analysis of Internal Memories" has been accepted for publication in the IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[Dec. 2025] Jeong-In Yun and Hyang Ju have won the Excellence Award at the 2025 Creative Convergence Contest.
[Nov. 2025] Jeong-In Yun and Hyang Ju have won the Silver Prize at the Undergraduate Paper Contest, 2025 KIIT Fall Conference, Jeju, South Korea, Nov. 2025.
[Nov. 2025] Minsu Jeong and Min Ju Bae have won the Bronze Prize at the 2025 IEIE IT Creative Challenge.
[Nov. 2025] Our paper entitled "Comprehensive and Hardware-Friendly Metric for Shifting-Based PAPR Reduction of DMT Systems" has been accepted for presentation at the 2026 International Conference on Electronics, Information, and Communication (ICEIC), Macau, China, Jan. 2026.
For more, please visit "News" page.
Digital Circuit Architectures Laboratory (DiCALab) is a research group in the Division of Electrical, Electronic, and Control Engineering, Kongju National University, Cheonan, South Korea. We aim to improve both algorithmic and architectural aspects of digital systems for various applications, e.g., telecommunications, artificial intelligence, and digital signal processing. In doing so, we renovate underlying algorithms to make them more suitable for hardware implementation, and develop energy-efficient architectures for VLSI circuits. To demonstrate the efficacy of our ideas, furthermore, we realize the corresponding systems on FPGAs and ASICs.
If interested, please do not hesitate to contact Prof. Byeong Yong Kong.