We will present the results of our JST-CREST research, which has been conducted over five and a half years since 2019. The workshop will also feature three invited talks from both domestic and international speakers.
The theme of the workshop is "Slow Electronics." In recent years, semiconductor electronics has been focused on increasing computational speed. However, this workshop aims to highlight the intriguing possibilities of pursuing slower computation, which goes against this mainstream trend.
The workshop will cover a wide range of topics, including device element development, theoretical approaches of Spiking Reservoirs, FPGA-based emulation, and ASIC integration. This will be an excellent opportunity to gain a comprehensive understanding of the brand-new research as a whole. Whether you are a beginner or an expert, you are welcome to attend. No pre-registration is required, and we will not collect attendee names on the day of the event.
The workshop will be conducted in a casual format. Basic questions, expert-level comments, calm observations, and passionate discussions are all highly encouraged.
While all presentations will be in English, please feel free to join us.
Please note that no printed programs or materials will be distributed at the venue, so we kindly ask you to print and bring any necessary documents in advance.
March 5, 2025: 10:00–17:00 (Doors open around 9:30)
March 6, 2025: 09:30–16:00 (Doors open around 9:00)
Multi-purpose Room (1F), Auditorium, AIST Tsukuba Central 1.
For access information, please refer to: AIST: Tsukuba Central Map.
The Auditorium is located at the very center of the campus, next to the pond. If you take the AIST shuttle bus, get off at the final stop, AIST Tsukuba Central. From there, walk toward the cafeteria and convenience store while keeping AIST Cube, the new exhibition hall, on your right. As you continue in that direction, the Auditorium will appear on your right-hand side.
Dr. Isao H. Inoue <isaocaius@gmail.com>
Please download from here.