Embedded Memory Circuit Design
Low power and reliable MRAM design for on-chip cache application
Static and dynamic power reduction technique for low power SRAM
Processing-In-Memory system using CMOS and post-CMOS memories
Stochastic neural networks enabled by emerging technologies
Hybrid Logic Circuit Design
Non-volatile standard cell design for fine-grained power-gating systems
Design of logic circuits based on novel magnetoelectronic devices
Error Correction Code System
Low complexity architecture of error correction codes
Error correction systems for emerging memories
Analog Digital Interface Integrated Circuits
Design of energy-efficient time-interleaved successive-approximation ADC
Low power and high density dual-slop ADC design
Lightweight Machine Learning Model
Efficient quantization for neural networks with low bit width weights and activations
Energy-efficient hybrid neural network for event-based application