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1. Redefinition of the Photoelectrochemical Etching Regime
Instead of relying on high-energy electrochemical or thermal-assisted processes, this research introduces a low-energy photoelectrochemical etching framework, enabling deterministic control over pore nucleation and growth dynamics.
Distinct advances include:
Suppression of excessive hole injection to stabilize pore evolution
Achievement of wafer-scale uniform nanoporous layers
Simultaneous realization of P-type and N-type porous silicon architectures
Significantly improved process reproducibility compared to conventional anodization
Figure 1. Integration of Nanoporous Silicon Devices with a Copper-Plated PCB Platform.
Figure 2. Schematic illustration of the low-energy photoelectrochemical etching strategy for nanoporous silicon fabrication, highlighting the suppression of excessive hole injection and the controlled formation of quantum-confined nanostructures.
2. Quantum-Confinement-Governed Luminescence Engineering
By tailoring nanocrystal dimensions within the porous matrix, the optical emission behavior is governed predominantly by quantum confinement rather than surface defect states.
Key findings:
Tunable visible emission achieved through pore size modulation
Laser-assisted etching enhances carrier generation efficiency
Clear correlation established between excitation wavelength, confinement scale, and radiative recombination
Substantial enhancement in photoluminescence stability and intensity
Figure 3. PL image of the nanoporous silicon layer prepared under optimized photoelectrochemical conditions, showing a uniform pore distribution and a well-controlled nanostructure suitable for quantum confinement.
Figure 4. Voltage- and illumination-dependent photoluminescence behavior of the nanoporous silicon structure, indicating effective carrier modulation and optoelectronic tunability.
3. Nanoporous Silicon P–N Junction Devices
Building upon the controlled doping and etching strategy, this work demonstrates electrically stable nanoporous silicon P–N junctions, exhibiting both rectifying behavior and electroluminescent response.
Device-level significance:
Reduced forward-bias operation voltage
Suppressed interface recombination losses
Improved electroluminescence uniformity
Viable pathway toward silicon-based light-emitting devices
Figure 5. Structural and optoelectronic characteristics of the P–N nanoporous silicon device fabricated via low-temperature liquid-phase bonding, confirming good interfacial integrity and stable light emission.
Figure 6. A large-area P-type porous silicon layer exhibiting red photoluminescence (PL) with minimal structural damage results in good luminescence uniformity.
4. Low-Temperature Liquid-Phase Bonding for Nanostructured Silicon
To address the thermal fragility of nanoporous silicon, a liquid-phase APTES-mediated bonding technique is implemented, enabling strong interfacial adhesion without compromising pore morphology.
Advantages:
Bonding achieved under low thermal budget
Preservation of nanoscale porosity
Reduced interfacial void formation
Enhanced integration compatibility with silicon photonic platforms
Figure 7.Photoelectrochemical etching combined with liquid-phase bonding produces a Si-O-Si bonded layer.
Figure 8. shows the FTIR spectra of the P–N nanoporous silicon samples before and after the liquid-phase bonding process.
A pronounced absorption band observed at approximately 1000–1100 cm⁻¹ is attributed to the Si–O–Si stretching vibration, indicating the formation of siloxane bonds at the bonding interface. This feature confirms successful interfacial condensation reactions between surface silanol groups during the bonding process. The absorption peaks located around 1400–1500 cm⁻¹ are assigned to –CH₂ bending vibrations, while the bands near 2850–2950 cm⁻¹ correspond to –CH₂ stretching modes, demonstrating the presence of organic linker molecules on the porous silicon surface. In addition, distinct peaks appearing at approximately 1550–1650 cm⁻¹ and 3200–3400 cm⁻¹ are associated with –NH₂ and –NH stretching vibrations, respectively. These nitrogen-related functional groups originate from amine-terminated molecules and play a critical role in promoting chemical bonding and mechanical stability at the P–N interface. The coexistence of Si–O–Si, –CH₂, and –NH vibrational modes provides strong evidence that the P–N nanoporous silicon layers are bonded through a combination of inorganic siloxane networks and organic molecular linkers, resulting in a chemically robust and electrically functional bonded interface.
Figure 9. Porous silicon diode device, side FE-SEM image.
Figure 10. Nanoporous silicon processing system integrating multi-wavelength photoelectrochemical etching, ultrasonic vibration, and low-temperature bonding
This figure illustrates an integrated nanoporous silicon processing system designed for the fabrication and assembly of porous silicon-based optoelectronic devices. The platform combines multi-wavelength laser-assisted photoelectrochemical etching, ultrasonic vibration, and low-temperature bonding technologies. In the etching module, UV light and a 1310 nm laser are introduced into an HF-based electrolyte to promote photogenerated carrier formation and enhance the electrochemical etching reaction. The PTFE bath, wafer holder, Au cathode, optical window, and polarizer provide a stable and chemically resistant processing environment for controlled nanopore formation on P-type and N-type silicon wafers. Ultrasonic vibration is applied during etching to remove hydrogen bubbles, improve mass transport, and enhance the uniformity of the nanoporous structure. After etching, the processed wafers are transferred to the low-temperature bonding system, where RF/plasma activation, vacuum control, cooling, and a precision bonding platform are used to integrate porous silicon layers without damaging the nanoscale pore structure. This system provides a complete process route from nanoporous silicon formation to device-level integration, offering potential applications in silicon-based light-emitting devices, photodetectors, sensors, filtration structures, and advanced semiconductor process development.
Figure 11. Schematic Illustration of Laser-Assisted Photoelectrochemical Etching and P–N Nanoporous Silicon Diode Fabrication
This figure illustrates the complete fabrication concept and working mechanism of a P–N nanoporous silicon diode prepared by laser-assisted photoelectrochemical etching with ultrasonic vibration. First, the photoelectrochemical etching system is constructed using a silicon wafer as the working electrode, a counter electrode, an electrolyte bath, an external power supply, and an ultrasonic vibration platform. During etching, laser irradiation is introduced to generate localized electron–hole pairs near the silicon/electrolyte interface. These photogenerated carriers promote selective silicon dissolution, allowing the etching reaction to proceed preferentially in the illuminated region. At the same time, ultrasonic vibration assists in removing hydrogen bubbles produced during the electrochemical reaction, which improves electrolyte transport, reduces surface shielding, and enhances pore uniformity. Through controlled etching conditions, the flat silicon surface gradually transforms into porous silicon and then into a nanoporous silicon structure containing silicon nanocrystals. Finally, the P-type and N-type nanoporous silicon layers are integrated into a diode structure. Under electrical bias, carrier injection and radiative recombination occur within the nanoporous silicon region, resulting in green emission at approximately 540 nm. This process provides a feasible route for fabricating silicon-based light-emitting devices by combining carrier-assisted etching, ultrasonic bubble removal, nanoporous structure formation, and P–N junction integration.
SiN waveguide test design
Figure 10. SiN Waveguide Test Chip and Silicon-Based Light-Emitting Device Platform
This research presents a silicon-based optoelectronic integrated platform combining a SiN waveguide test design with a p–n light-emitting device structure. The SiN waveguide test chip consists of multiple fan-out straight waveguide arrays with a linewidth of approximately 1.5 μm, designed for evaluating optical coupling, transmission stability, and fabrication uniformity. The light-emitting device is driven through an anode and cathode configuration, enabling visible light emission from the silicon-based active region. This platform demonstrates the potential integration of electrical excitation and optical transmission, providing a foundation for silicon photonics, biomedical sensing, micro-light sources, and highly integrated optoelectronic chip applications.
Impact and Application Potential
Impact and Application Potential
The proposed processing paradigm provides a scalable and CMOS-compatible route for integrating light-emitting, sensing, and photonic functionalities into silicon-based systems, with implications for on-chip optoelectronics, quantum photonic devices, and next-generation integrated sensors.
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