My group conducts research in the area of machine learning and quantum computing with a focus on hardware/algorithm co-design, which covers very large-scale integrated circuit (VLSI) design, computer architecture, electronic design automation, and machine learning/quantum computing algorithms et al. A summary of my past research themes is listed below.

1) Machine learning for science and engineering, e.g., electronic design automation. I explore leveraging machine learning methods to automate the design of circuits and computing systems. For example, we leverage reinforcement learning to automatically size analog/radio-frequency (RF) circuits and use graph learning to generate analog circuit topologies. Please check the prior publications [DAC '22][DAC '23][ICLR '23] for details.

2) Efficient hardware accelerator for machine learning applications. I explore the co-optimization of devices, efficient VLSI, emerging computing architecture (e.g., in/near-sensor computing and in/near-memory computing), and algorithms to unleash the performance of machine learning on hardware. Please check my prior publications [DATE '19][ICCAD '19][TCAD '20][TCAD '21][TC '22][ISLPED '22][ISCA '23][ISCAS '23] for details.

3) Robust and scalable quantum computing. I also do fundamental research to enhance the robustness and scalability of superconducting quantum computing systems through the design of circuits and algorithms. Please check the prior publications [Nature Nanotechnology '22][Scientific Reports '22] for details.

4) Hardware security. I am also lucky to have joined some collaborative projects to investigate hardware security issues of embedded systems from the perspective of power delivery networks. Please check some prior publications [ICCAD '22] [ICCAD '23] for a glance.

Overall, I explore joint methods of physics/circuits/architecture/algorithms between physical and information boundaries to enable high-performance and energy-efficient emerging computing systems. If you are interested in working with me, please take a look at the "Openings" section below.

I am always looking for self-motivated interns (remote is okay)/undergraduate/master/Ph.D. starting in the Fall, Summer, and Spring of each Calendar year, as well as visiting scholars to join my team. Candidates are expected to have backgrounds in one or more of the following areas: very large-scale integrated circuit (VLSI) design, computer architecture, machine learning, quantum physics/computing, information theory, and signal processing. Ph.D. candidates who have physical layout design (even better with tape-out) experience in VLSI and want to continue the research in VLSI design and computer architecture are especially encouraged to apply for the position and will be given a high priority for an interview. I am a big fan of interdisciplinary research. Therefore, excellent candidates not in these fields are also encouraged to contact me if you are interested in exploring new areas beyond your current experiences. If you are in the US, the starting date could be even more flexible, and very welcome to visit my lab for more details.

If you are interested in working with me and you are confident about your experiences/skills in the above fields, please email your applications to (weidong.cao AT gwu.edu) by including several key points as shown below:

1. CV and a list that includes the grades of core courses in your major;

2. The detailed experiences/skills that you have. Particularly, what are your proficiencies in these experiences/skills (using 1-5 to rank them, with 5 being the highest one and 1 being the lowest one)?

3. Why are you interested in working with me? You could specify them with several points.

4. When do you want to start your Ph.D./master/intern projects here? For non-Ph.D. candidates, please estimate how much time you can commit to the projects.

I often reply to the email within one week if you follow the above tips in your inquiry.