Pula Bhanu Teja, A. Mal, A. Manian, and B. D. Sahoo, “A 0.7-GHz to 6.15-GHz Wideband Frequency Synthesizer Using a Single LC-VCO in 65-nm CMOS Technology”, submitted to IEEE Trans. On Microwave Theory and Techniques.
S. Das, S. Konwar, S. Kumar, A. Sanyal, and B. D. Sahoo, “An 8-bit Split CDAC-Based Improved Latency Noise-Shaping SAR ADC for Biomedical Applications”, submitted to IEEE Trans. on Instrumentation and Measurements.
Bhanu T. Pula, R. S. Peerla, A. Mal, A. Dutta, and B. D. Sahoo, “Impact of Gate-Resistance on Wide-Band LC-VCO”, submitted to IEEE Trans. On Instrumentation and Measurements.
S. Sanjeet, S. Hosseinalipour, J. Xiong, M. Fujita, B. D. Sahoo, “Breaking the Barriers of One-to-One Usage of Implicit Neural Representation in Image Compression: A Linear Combination Approach with Performance Guarantees”, accepted in IEEE Internet of Things Journal, DOI: 10.1109/JIOT.2024.3502690
Senorita Deb, S. Sanjeet, P. K. Biswas, B. D. Sahoo, “Variable Resolution Pixel Quantization for Low Power Machine Vision Application on Edge”, accepted in IEEE Journal on Emerging and Selected Topics in Circuits and Systems, DOI: 10.1109/JETCAS.2024.3490504.
Sai Sanjeet, B. D. Sahoo, and K. K. Parhi, “SpikePipe: Accelerated Training of Spiking Neural Networks via Inter-Layer Pipelining and Multiprocessor Scheduling”, accepted in IEEE Transactions on Circuits and Systems for Artificial Intelligence, DOI: 10.1109/TCASAI.2024.3496837.
V. K. Surya, S. K. Prusty, B. D. Sahoo, and N. Wary, “Energy Efficient Resistor-Transconductor Hybrid Based Full-Duplex Transceiver for Serial Link”, IEEE Trans. On Circuits and systems-I, DoI:10.1109/TCSI.2024.3435530
Sai Sanjeet, J. Bird, and B. D. Sahoo “MEFET-BASED CAM/TCAM for Memory-Augmented Neural Networks”, IEEE Journal. on Exploratory Solid-State Computational Devices and Circuits, pp. 31-39, Jun. 2024.
T. Barton, S. Smith, Yu Hao, R. Watson, K. Rogers, B. D. Sahoo, N. Fulda, J. Yorgason, K. Warnick, M. F. Chang, Y-C. Kuan, and S. W. Chiang, “A Subthreshold Time-Domain Analog Spiking Neuron with PLL-Based Leak Circuit and Capacitive DAC Synapse”, IEEE Journal of Solid-State Circuits Letters, vol. 7, pp. 143-146, 2024, doi: 10.1109/LSSC.2024.3384762.
S. Mourya, B. La Cour, and B. Sahoo, “Quantum Algorithm Emulation using Analog Circuits”, accepted to IEEE Trans. on Quantum Engineering.
R. Shaik Peerla, A. Dutta, and B. Sahoo, "An Extended Range Divider Technique for Multi-Band PLL", J. Low Power Electronics Applications 2023, 13, 43. https://doi.org/10.3390/jlpea13030043.
B. Sahoo and G. Manganaro, “Generalized Sampling Based Multi-Channel Sampling of Signals Realized with Pure Delay Analog Filters and Digital FIR Filters”, accepted to IEEE Trans. On Circuits and Systems-II (DOI: 10.1109/TCSII.2023.3275650).
Shruti Konwar and B. Sahoo, “Johnson Counter Based Multiphase Generation for VCO Based ADC for Direct Digitization of Low Amplitude Sensor Signal”, IEEE Trans. On Instrumentation and Measurement, Vol. 72, 2023 (DOI: 10.1109/TIM.2023.3265121).
Sai Sanjeet, Shruti Konwar, and B. Sahoo, “Transition Point Estimation using RC-Filtered Square Wave for Calibration of SAR ADC”, IEEE Trans. On Circuits and systems-II, Vol. 70, no. 5, pp. 1794-1798, May 2023.
Sai Sanjeet, B. Sahoo, and M. Fujita, “Energy-Efficient FPGA Implementation of Power-of-2 Weights Based Convolutional Neural Networks with Low Bit-Precision Input Images”, IEEE Trans. On Circuits and Systems-II, vol. 70, no. 2, pp. 741-745, Feb. 2023. (DOI: 10.1109/TCSII.2022.3216516).
S. Konwar, H. Roy, S. W. Chiang, B. Sahoo, "Deterministic Dithering Based 12b 8 MS/s SAR ADC in 0.18µm CMOS", IEEE Solid-State Circuits Letters, vol. 5, pp. 243-246, 2022 (DOI: 10.1109/LSSC.2022.3210768).
P. P. Chary, R. S. Peerla, B. T. Pula, A. Dutta, and B. Sahoo, “Package Aware LC-VCO With Self-Biased Switched Capacitor Structure for Better Supply Noise Rejection”, IEEE Trans. On Components, Packaging, and Manufacturing Technology, vol. 12, pp. 1653-1660, Oct. 2022.
Sai Sanjeet, B. Sahoo, K. K. Parhi, “Low-energy Real FFT Architectures and Their Applications to Seizure Prediction from EEG”, Springer Analog Integrated Circuits and Signal Processing, Sept. 2022 (DOI: 10.1007/s10470-022-02094-z).
Shouharda Ghosh and B. Sahoo, “Closed-Form Expression for the Combined Effect of Offset, Gain, Timing, and Bandwidth mismatch in Time-Interleaved ADCs Using Generalized Sampling”, IEEE Trans. On Instrumentation and Measurement, vol. 70, 2021. (DOI: 10.1109/TIM.2021.3124042).
Vaibhav Krishna, Senorita Deb, and B. Sahoo, “Rail-to-rail Split-output SET Tolerant Digital Gates”, Springer Analog Integrated Circuits and Signal Processing, vol. 109, pp. 225-239, Oct. 2021.
Shouharda Ghosh, B. Sahoo, and Srikanth Nittala, “Performance Limits of Generalized Sampling Based 2-Channel Analog-to-Digital Converter”, IEEE Trans. On Circuits and Systems-II, vol. 68, no. 7, pp. 2257-2261, July 2021.
P. Jawalikar, N. Patle, and B. Sahoo, “Time-Domain Modeling and Analysis of Switched-Capacitor Converters”, IEEE Trans. On Power Electronics, vo. 35, No. 8, pp. 8276-8286, Aug. 2020.
A. R. Aravinth Kumar, Ashudeb Dutta, and B. Sahoo, “A Low-Power Reconfigurable Narrowband/Wideband LNA for Cognitive Radio-Wireless Sensor Network”, IEEE Trans. On VLSI, vol. 28, No. 1, pp. 212-223, Jan. 2020.
S. S. Regulagadda, B. Sahoo, Ashudeb Dutta, K. Y. Varma, and V. S. Rao A Packaged Noise-Canceling High-Gain Wideband Low Noise Amplifier”, IEEE Trans. On Circuits and Systems-II, vol. 66, no. 1, pp. 11-15, Jan. 2019.
A. R. A. Kumar, B. Sahoo, A. Dutta, “A Wideband 2-5 GHz Noise Canceling Subthreshold Low Noise Amplifier”, IEEE Trans. Of Circuits and Systems-II, vol. 65, no. 7, pp. 834-838, July 2018.
V. Sarma, Nevin A. Jacob, B. Sahoo, V. Narayanswamy, and V. Choudhary, “A 250-MHz Pipelined ADC-Based Noise-Shaping Bandpass ADC”, IEEE Trans. On Circuits and Systems-I, vol. 65, no. 6, pp. 1785-1794, June 2018.
V. Sarma, B. Sahoo, Rahul T., “A DC–1 GHz Continuously Tunable Bandpass ADC”, IEEE Trans. On VLSI, vol. 26, no. 3, pp. 558-571, Mar. 2018.
Nevin A. Jacob and B. Sahoo, “Analysis and Design of Single Reference Reduced Summer Loading based Switched Capacitor DFE”, Springer Circuits Systems and Signal Processing, Vol. 36, No. 12, pp. 4994-5018, Dec. 2017.
V. Sarma and B. Sahoo, “Achieving Theoretical Limit of SFDR in Pipelined ADCs”, IEEE Trans. On VLSI, Vol. 25, No. 11, pp. 3175-3185, Nov. 2017.
A. Inamdar, D. Amparo, B. Sahoo, J. Ren, and A. Sahu, “RSFQ/ERSFQ Cell Library with Improved Circuit Optimization and Timing Verification”, IEEE Trans. On Applied Superconductivity, vol. 27, No. 4, June 2017.
B. Sahoo and A. Inamdar, “Thermal Noise Canceling Switched Capacitor Circuit”, IEEE- IEEE Trans. Of Circuits and Systems-II, Vol. 63, No. 7, pp. 628-632, July. 2016.
H. Wei, P. Zhang, B. Sahoo, and B. Razavi, “An 8-Bit 4-GS/s 120-mW CMOS ADC”, IEEE Journal of Solid-State Circuits, Vol. 49, No. 8, pp. 1751-1761, Aug. 2014
V. Sarma and B. Sahoo, “Error feedback-based noise shaping in a double sampled ADC”, Springer Analog Integrated Circuits and Signal Processing, vol. 78, Issue, 2, pp. 421-430, Feb. 2014.
V. Sarma and B. Sahoo, "Pipelined ADC based design of bandpass DS-ADC", Electronics Letters, Vol. 49, Issue 10, pp. 646-648, May 2013.
B. Sahoo and B. Razavi, "A 10-Bit 1-GHz 33-mW CMOS ADC", IEEE Journal of Solid-State Circuits, Vol. 48, No. 6, pp. 1442-1452, June 2013.
B. Sahoo and Behzad Razavi, “A 12-Bit 200-MHz CMOS ADC”, IEEE Journal of Solid-State Circuits, Vol. 44, No. 9, pp. 2366-2380, Sept. 2009.
B. Sahoo and Keshab K. Parhi, “A Low Power Correlator for CDMA Wireless Systems”, Journal of VLSI Signal Processing, Vol. 35, pp. 105-112, August 2003.